Walter Bright wrote:
Don wrote:
I had a further look at this. The compiler *is* creating doubles and
floats as signalling NaNs. Turns out, that there are slight
differences between processors in the way they treat signalling NaNs,
especially between Intel vs AMD. Intel Core2 triggers SNANs when
loading floats & doubles, but *doesn't* trigger for 80-bit SNANs. The
Pentium M that I did most of my testing on, didn't trigger for any of
them. AMD's docs say that it triggers for all of them.
Won't be too hard to fix.
How do we fix the CPU? ;-)
Yeah. Actually the CPU problem is an accepts-invalid bug. It worked on
my Pentium M, but it shouldn't have.
The problem is what DMD does to the "uninitialized assignments".
float x;
gets changed into
float x = double.snan;
and is implemented with
fld float.snan; fstp x;
The FLD is triggering the snan. They should be changed into mov EAX,
reinterpret_cast<int>(float.snan); mov x, EAX;
There's another reason for doing this. On Pentium 4, x87 NaNs are
incredibly slow. More than 250 cycles!!! On AMD and on Pentium 4 SSE2,
they are the same as any other value (about 0.5 cycles). Yet another
reason to hate the P4. But still, this is such a horrific performance
killer that we ought to avoid it.
