https://issues.dlang.org/show_bug.cgi?id=12971

safety0ff.bugz <[email protected]> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
            Summary|DMD inline asm outputs      |Missing REX prefix for 8
                   |wrong AND instruction       |bit register access

--- Comment #3 from safety0ff.bugz <[email protected]> ---
Likely affects SPL, BPL, SIL and DIL since they all require REX.

--

Reply via email to