On Monday, 4 November 2019 at 19:53:29 UTC, bioinfornatics wrote:
3/ variable flagged as `shared` does at mean the variable is put into L2 cache ?

First caching is controlled by CPU not programmer.
Second not all architectures share L2 between cores.
4 jaguar cores share L2 cache in consoles
https://images.anandtech.com/doci/6976/Screen%20Shot%202013-05-23%20at%2012.22.12%20AM_678x452.png

2 bulldozer cores share L2 cache in FX processors
https://s3.amazonaws.com/hs-wordpress/wp-content/uploads/2017/12/13035240/bulldozer_021.jpg

each zen core has its own L2 cache in Ryzen cpu's
https://images.anandtech.com/doci/10591/HC28.AMD.Mike%20Clark.final-page-014.jpg


Third your link to run.dlang is 404

While you cant control cache contents explicitly you can control it by changing memory access patterns. When you fetch a peace of data CPU will load 64 byte size bucket/chunk that contains your data into L1 cache. Since L1 cache size is limited CPU had to remove existing data from L1 based on its eviction policy. Evicted data goes into L2 cache. That is the way to control what is where.

By default all variables(except immutable or static) are thread local and can only be accessed by one thread. Shared keyword makes data accessible trough multiple threads


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