On 14-11-2012 02:52, Andrei Alexandrescu wrote:
On 11/13/12 3:48 PM, Alex Rønne Petersen wrote:
Slices and delegates can't be loaded/stored atomically because very few
architectures provide instructions to atomically load/store 16 bytes of
data (required on 64-bit; 32-bit would be fine since that's just 8
bytes, but portability is king). This is also why ucent, cent, and real
are not included in the list.
When I wrote TDPL I looked at the contemporary architectures and it
seemed all were or were about to support double-word atomic ops. So the
intent is to allow shared delegates and slices.
Are there any architectures today that don't support double-word load,
store, and CAS?
Andrei
I do not know of a single architecture apart from x86 that supports >
8-byte load/store/CAS (and come to think of it, I'm not so sure x86
actually can do 16-byte load/store, only CAS). So while a shared
delegate is doable in 32-bit, it isn't really in 64-bit.
(I deliberately talk in terms of bytes here because that's the
nomenclature most architecture manuals use from what I've seen.)
--
Alex Rønne Petersen
[email protected]
http://lycus.org
