On Wednesday, 19 August 2015 at 09:55:19 UTC, Dmitry Olshansky
wrote:
On 19-Aug-2015 12:46, "Ola Fosheim =?UTF-8?B?R3LDuHN0YWQi?=
<[email protected]>" wrote:
On Wednesday, 19 August 2015 at 09:29:31 UTC, Dmitry Olshansky
wrote:
I do not. I underestime the benefits of tons of subtle passes
that
play into 0.1-0.2% in some cases. There are lots and lots of
this in
GCC/LLVM. If having the best code generated out there is not
the goal
we can safely omit most of these focusing on the most
critical bits.
Well, you can start on this now, but by the time it is ready
and
hardened, LLVM might have received improved AVX2 and AVX-512
code gen
from Intel. Which basically will leave DMD in the dust.
On numerics, video-codecs and the like. Not like compilers
solely depend on AVX.
Even in video codec, AVX2 is not that useful and barely brings a
10% improvements over SSE, while being extra careful with SSE-AVX
transition penalty. And to reap this benefit you would have to
write in intrinsics/assembly.
For AVX-512 I can't even imagine what to use such large register
for. Larger registers => more spilling because of calling
conventions, and more fiddling around with complicated shuffle
instructions. There is a steep diminishing returns with
increasing registers size.
