On Saturday, 19 December 2015 at 02:20:32 UTC, Ola Fosheim Grøstad wrote:
On Friday, 18 December 2015 at 20:40:48 UTC, Barry L. wrote:
Summary - modern financial trading apps use multi-core machines and shared memory via memory mapped files, and multi-core boxes to achieve nanosecond latency.

1 nanosecond => 3 clock cycles. A single read from RAM is > 100 cycles.

In that ballpark you have to use silicone/FPGA.

Yep, my typo, meant low microsecond.

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