bearophile wrote:
I agree. CPUs have prefetching instructions, but D doesn't expose them as intrinsics. A bit more higher level visibility for those instructions may be positive today.
Huh, I simply could never find a document about how to use those which gave me any comfortable sense that the author knew what he was talking about.
The same goes for the memory fence instructions. Talk to 3 experts about them, and you get 3 wildly different answers. The Intel docs are zero help.
