Hi,

I have an urgent requirement for “*Verification Engineer”* at *Austin, TX or
Boxborough, MA* for *9 months assignment*. Please let me know if you would
be interested and get back to me with your updated resume in .DOC
immediately. Given below is the job description respond back to me with the
following information asked ASAP.



*Job Description:*



We are currently looking for “*Verification Engineer”,* an urgent job
opportunity with our Client. The requirement details are as follows



*Location*: Austin, TX or Boxborough, MA

*Duration*: 9 months Contract



Two Sr. Engineers (>8 years experience)

Four Engineer II (>5 years experience)

Two Engineer I (>3 years experience)



*KEY JOB FUNCTIONS:  *

·         Develop environments for complex microprocessor functional
verification and debug both functional and environmental errors in the
HDL/logic model, using simulation tools, debug tools and programming skills,
based on in-depth understanding of the architecture and HDL/logical design.

·         Develop an automated regression infrastructure setup for
functional verification of high speed microprocessor designs.

·         Develop/run directed tests for current and new functional features
and develop/use random excercisors, to validate functionality of processor
system designs.

·         Debug regression fails at the RTL and gate level.

* *

*DESIRABLE EXPERIENCE AND KNOWLEDGE (should include, however not limited
to):  *

·         Software infrastructure for validation of architecture
correctness.

·         Directed and Random functional test environment development and
use

·         Experience with functional/power/performance verification using
simulation and emulation environments

·         Create test plans for complex IPs include multiple processors

·         Developing test benches in OVM, SystemVerilog and/or C++, applying
pseudo-random test generators, developing System Verilog/C/assembly tests,
analyzing coverage and design-for-test on next generation Processor SOC chip
projects.

* *

*DESIRABLE KNOWLEDGE (should include, however not limited to):*

Knowledge with Verilog SystemVerilog, HDL, programming in Perl, C/C++, logic
simulation is a requirement. Direct experience with OVM simulation
environment is a strong plus. Knowledge of computer and peripheral
architectures is also required.



*Kindly provide the following details for quick process:*

Full Name:

Contact:

Email:

Current Location ( City & State ):

Visa Status:

Availability:

SSN # (Last 4-digits):

Best Hourly Rate:

Two Professional References:







*Thanks & Regards*,

*Bonny Elvis **| Halcyon Solutions Inc** *

**

Direct: 614-245-0596 | Fax: 614-552-9095

Email: [email protected] | IM:  [email protected]

Web: www.halcyonit.com

5880 Innovation Drive, Dublin (Columbus), Ohio 43016
 * *

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