And here's version 3 of the triple buffering/field parity ioctl thing.
What's new?
- CRTC1 support
- CRTC2 sub-picture support (including field parity :)
--
Ville Syrjälä
[EMAIL PROTECTED]
http://www.sci.fi/~syrjala/
diff -urpN linux-2.6.14-2/drivers/video/matrox/matroxfb_base.c
linux-2.6.14-3/drivers/video/matrox/matroxfb_base.c
--- linux-2.6.14-2/drivers/video/matrox/matroxfb_base.c 2005-11-01
18:46:02.000000000 +0200
+++ linux-2.6.14-3/drivers/video/matrox/matroxfb_base.c 2005-11-01
19:22:45.000000000 +0200
@@ -191,6 +191,7 @@ static void matroxfb_crtc1_panpos(WPMINF
ACCESS_FBINFO(crtc1.panpos) = -1; /* No update pending
anymore */
extvga_reg = mga_inb(M_EXTVGA_INDEX);
mga_setr(M_EXTVGA_INDEX, 0x00, panpos);
+ mga_inb(M_EXTVGA_INDEX);
if (extvga_reg != 0x00) {
mga_outb(M_EXTVGA_INDEX, extvga_reg);
}
@@ -208,16 +209,36 @@ static irqreturn_t matrox_irq(int irq, v
status = mga_inl(M_STATUS);
+ if (status & 0x220)
+ mga_outl(M_ICLEAR, status & 0x220);
+
if (status & 0x20) {
- mga_outl(M_ICLEAR, 0x20);
ACCESS_FBINFO(crtc1.vsync.cnt)++;
matroxfb_crtc1_panpos(PMINFO2);
wake_up_interruptible(&ACCESS_FBINFO(crtc1.vsync.wait));
handled = 1;
}
if (status & 0x200) {
- mga_outl(M_ICLEAR, 0x200);
ACCESS_FBINFO(crtc2.vsync.cnt)++;
+ ACCESS_FBINFO(crtc2.vsync.field) = (mga_inl(0x3C48) >> 24) ^ 1;
+ if (ACCESS_FBINFO(crtc2.pan) &&
+ ACCESS_FBINFO(crtc2.address.field) !=
ACCESS_FBINFO(crtc2.vsync.field)) {
+ ACCESS_FBINFO(crtc2.pan) = 0;
+ mga_outl(0x3C28,
ACCESS_FBINFO(crtc2.address.offset[0]));
+ mga_outl(0x3C2C,
ACCESS_FBINFO(crtc2.address.offset[1]));
+ mga_outl(0x3C30,
ACCESS_FBINFO(crtc2.address.offset[2]));
+ mga_outl(0x3C34,
ACCESS_FBINFO(crtc2.address.offset[3]));
+ mga_outl(0x3C38,
ACCESS_FBINFO(crtc2.address.offset[4]));
+ mga_outl(0x3C3C,
ACCESS_FBINFO(crtc2.address.offset[5]));
+ mga_inl(0x3C3C);
+ }
+ if (ACCESS_FBINFO(spic.pan) &&
+ ACCESS_FBINFO(spic.address.field) !=
ACCESS_FBINFO(crtc2.vsync.field)) {
+ ACCESS_FBINFO(spic.pan) = 0;
+ mga_outl(0x3C54, ACCESS_FBINFO(spic.address.offset[0]));
+ mga_outl(0x3C58, ACCESS_FBINFO(spic.address.offset[1]));
+ mga_inl(0x3C58);
+ }
wake_up_interruptible(&ACCESS_FBINFO(crtc2.vsync.wait));
handled = 1;
}
@@ -300,6 +321,162 @@ int matroxfb_wait_for_sync(WPMINFO u_int
return 0;
}
+int matroxfb_address(WPMINFO struct matrox_address *address)
+{
+ if (address->device == MATROX_ADDRESS_DEVICE_CRTC1) {
+ int diff, linecomp = ACCESS_FBINFO(fbcon).var.yres;
+ unsigned int p0, p1, p2, p3, pos;
+ unsigned long flags;
+ int err;
+
+ pos = address->offset[0] * ACCESS_FBINFO(curr.final_bppShift) /
32;
+ pos += ACCESS_FBINFO(curr.ydstorg.chunks);
+
+ p0 = ACCESS_FBINFO(hw).CRTC[0x0D] = pos & 0xFF;
+ p1 = ACCESS_FBINFO(hw).CRTC[0x0C] = (pos & 0xFF00) >> 8;
+ p2 = ACCESS_FBINFO(hw).CRTCEXT[0] =
(ACCESS_FBINFO(hw).CRTCEXT[0] & 0xB0) |
+ ((pos >> 16) & 0x0F) |
((pos >> 14) & 0x40);
+ p3 = ACCESS_FBINFO(hw).CRTCEXT[8] = pos >> 21;
+
+ err = matroxfb_enable_irq(PMINFO 0);
+
+ do {
+ diff = linecomp - mga_inl(0x1E20);
+ } while (-2 < diff && diff < 2);
+
+ CRITBEGIN
+
+ matroxfb_DAC_lock_irqsave(flags);
+ mga_setr(M_CRTC_INDEX, 0x0D, p0);
+ mga_setr(M_CRTC_INDEX, 0x0C, p1);
+ mga_setr(M_EXTVGA_INDEX, 0x08, p3);
+ if (!err) {
+ ACCESS_FBINFO(crtc1.panpos) = p2;
+ } else {
+ /* Abort any pending change */
+ ACCESS_FBINFO(crtc1.panpos) = -1;
+ mga_setr(M_EXTVGA_INDEX, 0x00, p2);
+ mga_inb(M_EXTVGA_INDEX);
+ }
+ matroxfb_DAC_unlock_irqrestore(flags);
+
+ CRITEND
+
+ address->field = -1; /* N/A */
+ address->count = ACCESS_FBINFO(crtc1.vsync.cnt);
+
+ return 0;
+ } else
+ if (address->device == MATROX_ADDRESS_DEVICE_CRTC2 &&
+ ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400) {
+ int diff, c2vlinecomp = (mga_inl(0x3C44) >> 16) & 0xFFF;
+ int err;
+
+ /* Interrupts are always needed to update vsync.cnt. */
+ err = matroxfb_enable_irq(PMINFO 0);
+
+ do {
+ diff = c2vlinecomp - mga_inl(0x3C48);
+ } while (-2 < diff && diff < 2);
+
+ if (!err && address->field == ACCESS_FBINFO(crtc2.vsync.field))
{
+ ACCESS_FBINFO(crtc2.address) = *address;
+ ACCESS_FBINFO(crtc2.pan) = 1;
+ } else {
+ ACCESS_FBINFO(crtc2.pan) = 0;
+
+ mga_outl(0x3C28, address->offset[0]);
+ mga_outl(0x3C2C, address->offset[1]);
+ mga_outl(0x3C30, address->offset[2]);
+ mga_outl(0x3C34, address->offset[3]);
+ mga_outl(0x3C38, address->offset[4]);
+ mga_outl(0x3C3C, address->offset[5]);
+ mga_inl(0x3C3C);
+ }
+
+ address->field = ACCESS_FBINFO(crtc2.vsync.field);
+ address->count = ACCESS_FBINFO(crtc2.vsync.cnt);
+
+ return 0;
+ } else
+ if (address->device == MATROX_ADDRESS_DEVICE_SPIC &&
+ ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400) {
+ int diff, c2vlinecomp = (mga_inl(0x3C44) >> 16) & 0xFFF;
+ int err;
+
+ /* Interrupts are always needed to update vsync.cnt. */
+ err = matroxfb_enable_irq(PMINFO 0);
+
+ do {
+ diff = c2vlinecomp - mga_inl(0x3C48);
+ } while (-2 < diff && diff < 2);
+
+ if (!err && address->field == ACCESS_FBINFO(crtc2.vsync.field))
{
+ ACCESS_FBINFO(spic.address) = *address;
+ ACCESS_FBINFO(spic.pan) = 1;
+ } else {
+ ACCESS_FBINFO(spic.pan) = 0;
+
+ mga_outl(0x3C54, address->offset[0]);
+ mga_outl(0x3C58, address->offset[1]);
+ mga_inl(0x3C58);
+ }
+
+ address->field = ACCESS_FBINFO(crtc2.vsync.field);
+ address->count = ACCESS_FBINFO(crtc2.vsync.cnt);
+
+ return 0;
+ } else
+ if (address->device == MATROX_ADDRESS_DEVICE_BES &&
+ ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400) {
+ int diff, besvcnt = (mga_inl(0x3DC0) >> 16) & 0xFFF;
+
+ /* Interrupts are always needed to update vsync.cnt. */
+ matroxfb_enable_irq(PMINFO 0);
+
+ do {
+ diff = besvcnt - mga_inl(0x1E20);
+ } while (-2 < diff && diff < 2);
+
+ mga_outl(0x3D00, address->offset[0]);
+ mga_outl(0x3D04, address->offset[1]);
+ mga_outl(0x3D10, address->offset[2]);
+ mga_outl(0x3D14, address->offset[3]);
+ mga_outl(0x3D60, address->offset[4]);
+ mga_outl(0x3D64, address->offset[5]);
+ mga_inl(0x3D64);
+
+ address->field = -1; /* N/A */
+ address->count = ACCESS_FBINFO(crtc1.vsync.cnt);
+
+ return 0;
+ } else
+ if (address->device == MATROX_ADDRESS_DEVICE_BES &&
+ ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG200) {
+ int diff, besvcnt = (mga_inl(0x3DC0) >> 16) & 0xFFF;
+
+ /* Interrupts are always needed to update vsync.cnt. */
+ matroxfb_enable_irq(PMINFO 0);
+
+ do {
+ diff = besvcnt - mga_inl(0x1E20);
+ } while (-2 < diff && diff < 2);
+
+ mga_outl(0x3D00, address->offset[0]);
+ mga_outl(0x3D04, address->offset[1]);
+ mga_outl(0x3D10, address->offset[2]);
+ mga_outl(0x3D14, address->offset[3]);
+ mga_inl(0x3D14);
+
+ address->field = -1; /* N/A */
+ address->count = ACCESS_FBINFO(crtc1.vsync.cnt);
+
+ return 0;
+ }
+
+ return -ENODEV;
+}
+
/* --------------------------------------------------------------------- */
static void matrox_pan_var(WPMINFO struct fb_var_screeninfo *var) {
@@ -1160,6 +1337,23 @@ static int matroxfb_ioctl(struct inode *
up_read(&ACCESS_FBINFO(altout).lock);
return err;
}
+ case MATROXFB_ADDRESS:
+ {
+ struct matrox_address address;
+ int err;
+
+ if (copy_from_user(&address, argp,
sizeof(address)))
+ return -EFAULT;
+
+ err = matroxfb_address(PMINFO &address);
+ if (err)
+ return err;
+
+ if (copy_to_user(argp, &address,
sizeof(address)))
+ return -EFAULT;
+
+ return 0;
+ }
}
return -ENOTTY;
}
diff -urpN linux-2.6.14-2/drivers/video/matrox/matroxfb_base.h
linux-2.6.14-3/drivers/video/matrox/matroxfb_base.h
--- linux-2.6.14-2/drivers/video/matrox/matroxfb_base.h 2005-11-01
18:44:07.000000000 +0200
+++ linux-2.6.14-3/drivers/video/matrox/matroxfb_base.h 2005-11-01
19:20:48.000000000 +0200
@@ -360,6 +360,20 @@ struct matroxfb_dh_fb_info;
struct matrox_vsync {
wait_queue_head_t wait;
unsigned int cnt;
+ unsigned int field;
+};
+
+#define MATROXFB_ADDRESS _IOWR('n', 0xFC, struct matrox_address)
+
+#define MATROX_ADDRESS_DEVICE_CRTC1 0
+#define MATROX_ADDRESS_DEVICE_BES 1
+#define MATROX_ADDRESS_DEVICE_CRTC2 2
+#define MATROX_ADDRESS_DEVICE_SPIC 3
+struct matrox_address {
+ u32 device;
+ u32 field;
+ u32 count;
+ u32 offset[6];
};
struct matrox_fb_info {
@@ -393,8 +407,14 @@ struct matrox_fb_info {
int mnp;
struct matroxfb_dh_fb_info* info;
struct rw_semaphore lock;
+ int pan;
+ struct matrox_address address;
} crtc2;
struct {
+ int pan;
+ struct matrox_address address;
+ } spic;
+ struct {
struct rw_semaphore lock;
struct {
int brightness, contrast, saturation, hue, gamma;
diff -urpN linux-2.6.14-2/drivers/video/matrox/matroxfb_misc.c
linux-2.6.14-3/drivers/video/matrox/matroxfb_misc.c
--- linux-2.6.14-2/drivers/video/matrox/matroxfb_misc.c 2005-11-01
18:44:07.000000000 +0200
+++ linux-2.6.14-3/drivers/video/matrox/matroxfb_misc.c 2005-11-01
19:21:06.000000000 +0200
@@ -273,7 +273,7 @@ int matroxfb_vgaHWinit(WPMINFO struct my
vs = m->VSyncStart - 1;
ve = m->VSyncEnd - 1;
vt = m->VTotal - 2;
- lc = vd;
+ lc = vd + 1;
/* G200 cannot work with (ht & 7) == 6 */
if (((ht & 0x07) == 0x06) || ((ht & 0x0F) == 0x04))
ht++;
Index: gfxdrivers/matrox/matrox_bes.c
===================================================================
RCS file: /cvs/directfb/DirectFB/gfxdrivers/matrox/matrox_bes.c,v
retrieving revision 1.61
diff -u -r1.61 matrox_bes.c
--- gfxdrivers/matrox/matrox_bes.c 1 Nov 2005 15:11:14 -0000 1.61
+++ gfxdrivers/matrox/matrox_bes.c 1 Nov 2005 16:21:28 -0000
@@ -56,12 +56,15 @@
#include <misc/util.h>
+#include <fbdev/fbdev.h>
+
#include "regs.h"
#include "mmio.h"
#include "matrox.h"
typedef struct {
CoreLayerRegionConfig config;
+ __u32 last_count;
/* Stored registers */
struct {
@@ -268,6 +271,8 @@
{
bes_calc_regs( mdrv, mbes, config, surface );
bes_set_regs( mdrv, mbes, true );
+
+ mbes->last_count = 0;
}
/* set color key */
@@ -324,10 +329,36 @@
MatroxDriverData *mdrv = (MatroxDriverData*) driver_data;
MatroxBesLayerData *mbes = (MatroxBesLayerData*) layer_data;
+#if 0
bes_calc_regs( mdrv, mbes, &mbes->config, surface );
bes_set_regs( mdrv, mbes, flags & DSFLIP_ONSYNC );
dfb_surface_flip_buffers( surface, false );
+#else
+ {
+ FBDev *dfb_fbdev = dfb_system_data();
+ struct matrox_address address;
+
+ bes_calc_regs( mdrv, mbes, &mbes->config, surface );
+
+ address.device = MATROX_ADDRESS_DEVICE_BES;
+ address.field = -1;
+ address.count = mbes->last_count + 1;
+ address.offset[0] = mbes->regs.besA1ORG;
+ address.offset[1] = mbes->regs.besA2ORG;
+ address.offset[2] = mbes->regs.besA1CORG;
+ address.offset[3] = mbes->regs.besA2CORG;
+ address.offset[4] = mbes->regs.besA1C3ORG;
+ address.offset[5] = mbes->regs.besA2C3ORG;
+
+ if (ioctl( dfb_fbdev->fd, MATROXFB_ADDRESS, &address ))
+ D_ERROR( "DirectFB/Matrox/BES Address ioctl() failed!\n" );
+
+ dfb_surface_flip_buffers( surface, address.count == mbes->last_count
);
+
+ mbes->last_count = address.count;
+ }
+#endif
if (flags & DSFLIP_WAIT)
dfb_screen_wait_vsync( mdrv->primary );
Index: gfxdrivers/matrox/matrox_crtc2.c
===================================================================
RCS file: /cvs/directfb/DirectFB/gfxdrivers/matrox/matrox_crtc2.c,v
retrieving revision 1.32
diff -u -r1.32 matrox_crtc2.c
--- gfxdrivers/matrox/matrox_crtc2.c 1 Nov 2005 15:26:28 -0000 1.32
+++ gfxdrivers/matrox/matrox_crtc2.c 1 Nov 2005 16:21:28 -0000
@@ -61,7 +61,10 @@
typedef struct {
CoreLayerRegionConfig config;
DFBColorAdjustment adj;
- int field;
+ __u32 parity;
+ __u32 last_parity;
+ __u32 last_field;
+ __u32 last_count;
/* Stored registers */
struct {
@@ -247,7 +250,7 @@
mcrtc2->config = *config;
if (updated & CLRCF_PARITY)
- mcrtc2->field = !config->parity;
+ mcrtc2->parity = !config->parity;
if (updated & (CLRCF_WIDTH | CLRCF_HEIGHT | CLRCF_FORMAT |
CLRCF_SURFACE_CAPS | CLRCF_ALPHA_RAMP | CLRCF_SURFACE)) {
@@ -257,6 +260,10 @@
ret = crtc2_enable_output( mdrv, mcrtc2 );
if (ret)
return ret;
+
+ mcrtc2->last_parity = -1;
+ mcrtc2->last_field = 0;
+ mcrtc2->last_count = 0;
}
return DFB_OK;
@@ -286,6 +293,7 @@
{
MatroxDriverData *mdrv = (MatroxDriverData*) driver_data;
MatroxCrtc2LayerData *mcrtc2 = (MatroxCrtc2LayerData*) layer_data;
+#if 0
volatile __u8 *mmio = mdrv->mmio_base;
crtc2_calc_buffer( mdrv, mcrtc2, surface );
@@ -293,7 +301,7 @@
if (mcrtc2->config.options & DLOP_FIELD_PARITY) {
int field = (mga_in32( mmio, C2VCOUNT ) & C2FIELD) ? 1 : 0;
- while (field == mcrtc2->field) {
+ while (field == mcrtc2->parity) {
dfb_screen_wait_vsync( mdrv->secondary );
field = (mga_in32( mmio, C2VCOUNT ) & C2FIELD) ? 1 : 0;
@@ -302,6 +310,38 @@
crtc2_set_buffer( mdrv, mcrtc2 );
dfb_surface_flip_buffers( surface, false );
+#else
+ {
+ FBDev *dfb_fbdev = dfb_system_data();
+ struct matrox_address address;
+ __u32 diff;
+
+ crtc2_calc_buffer( mdrv, mcrtc2, surface );
+
+ address.device = MATROX_ADDRESS_DEVICE_CRTC2;
+ address.field = (mcrtc2->config.options & DLOP_FIELD_PARITY) ?
mcrtc2->parity : -1;
+ address.count = mcrtc2->last_count + 2;
+ address.offset[0] = mcrtc2->regs.c2STARTADD0;
+ address.offset[1] = mcrtc2->regs.c2STARTADD1;
+ address.offset[2] = mcrtc2->regs.c2PL2STARTADD0;
+ address.offset[3] = mcrtc2->regs.c2PL2STARTADD1;
+ address.offset[4] = mcrtc2->regs.c2PL3STARTADD0;
+ address.offset[5] = mcrtc2->regs.c2PL3STARTADD1;
+
+ if (ioctl( dfb_fbdev->fd, MATROXFB_ADDRESS, &address ))
+ D_ERROR( "DirectFB/Matrox/CRTC2 Address ioctl() failed!\n" );
+
+ diff = address.count >= mcrtc2->last_count ?
+ address.count - mcrtc2->last_count :
+ 0xFFFFFFFF - mcrtc2->last_count + address.count;
+
+ dfb_surface_flip_buffers( surface, diff == 0 || (diff == 1 &&
mcrtc2->last_field == mcrtc2->last_parity) );
+
+ mcrtc2->last_count = address.count;
+ mcrtc2->last_field = address.field;
+ mcrtc2->last_parity = (mcrtc2->config.options & DLOP_FIELD_PARITY) ?
mcrtc2->parity : -1;
+ }
+#endif
if (flags & DSFLIP_WAIT)
dfb_screen_wait_vsync( mdrv->secondary );
@@ -492,7 +532,7 @@
mcrtc2->regs.c2MISC = 0;
/* c2vlinecomp */
- mcrtc2->regs.c2MISC |= (vdisplay + 1) << 16;
+ mcrtc2->regs.c2MISC |= (vdisplay << 16) | 0x77;
}
/* c2bpp15halpha */
Index: gfxdrivers/matrox/matrox_spic.c
===================================================================
RCS file: /cvs/directfb/DirectFB/gfxdrivers/matrox/matrox_spic.c,v
retrieving revision 1.17
diff -u -r1.17 matrox_spic.c
--- gfxdrivers/matrox/matrox_spic.c 1 Nov 2005 16:13:13 -0000 1.17
+++ gfxdrivers/matrox/matrox_spic.c 1 Nov 2005 16:21:28 -0000
@@ -60,6 +60,10 @@
typedef struct {
CoreLayerRegionConfig config;
+ __u32 parity;
+ __u32 last_parity;
+ __u32 last_field;
+ __u32 last_count;
/* Stored registers */
struct {
@@ -78,7 +82,7 @@
static void spic_set_buffer( MatroxDriverData *mdrv,
MatroxSpicLayerData *mspic );
-#define SPIC_SUPPORTED_OPTIONS (DLOP_ALPHACHANNEL | DLOP_OPACITY)
+#define SPIC_SUPPORTED_OPTIONS (DLOP_ALPHACHANNEL | DLOP_OPACITY |
DLOP_FIELD_PARITY)
/**********************/
@@ -197,6 +201,9 @@
/* remember configuration */
mspic->config = *config;
+ if (updated & CLRCF_PARITY)
+ mspic->parity = !config->parity;
+
if (updated & CLRCF_PALETTE) {
__u8 y, cb, cr;
int i;
@@ -238,6 +245,10 @@
mspic->regs.c2DATACTL |= ((config->opacity + 1) << 20) & C2STATICKEY;
mga_out32( mmio, mspic->regs.c2DATACTL, C2DATACTL);
+
+ mspic->last_parity = -1;
+ mspic->last_field = 0;
+ mspic->last_count = 0;
}
return DFB_OK;
@@ -273,10 +284,39 @@
MatroxDriverData *mdrv = (MatroxDriverData*) driver_data;
MatroxSpicLayerData *mspic = (MatroxSpicLayerData*) layer_data;
+#if 0
spic_calc_buffer( mdrv, mspic, surface );
spic_set_buffer( mdrv, mspic );
dfb_surface_flip_buffers( surface, false );
+#else
+ {
+ FBDev *dfb_fbdev = dfb_system_data();
+ struct matrox_address address;
+ __u32 diff;
+
+ spic_calc_buffer( mdrv, mspic, surface );
+
+ address.device = MATROX_ADDRESS_DEVICE_SPIC;
+ address.field = (mspic->config.options & DLOP_FIELD_PARITY) ?
mspic->parity : -1;
+ address.count = mspic->last_count + 2;
+ address.offset[0] = mspic->regs.c2SPICSTARTADD0;
+ address.offset[1] = mspic->regs.c2SPICSTARTADD1;
+
+ if (ioctl( dfb_fbdev->fd, MATROXFB_ADDRESS, &address ))
+ D_ERROR( "DirectFB/Matrox/SPIC Address ioctl() failed!\n" );
+
+ diff = address.count >= mspic->last_count ?
+ address.count - mspic->last_count :
+ 0xFFFFFFFF - mspic->last_count + address.count;
+
+ dfb_surface_flip_buffers( surface, diff == 0 || (diff == 1 &&
mspic->last_field == mspic->last_parity) );
+
+ mspic->last_count = address.count;
+ mspic->last_field = address.field;
+ mspic->last_parity = (mspic->config.options & DLOP_FIELD_PARITY) ?
mspic->parity : -1;
+ }
+#endif
return DFB_OK;
}
Index: systems/fbdev/fbdev.c
===================================================================
RCS file: /cvs/directfb/DirectFB/systems/fbdev/fbdev.c,v
retrieving revision 1.30
diff -u -r1.30 fbdev.c
--- systems/fbdev/fbdev.c 18 Oct 2005 10:57:32 -0000 1.30
+++ systems/fbdev/fbdev.c 1 Nov 2005 16:21:28 -0000
@@ -1276,6 +1276,7 @@
CoreSurface *surface,
DFBSurfaceFlipFlags flags )
{
+#if 0
DFBResult ret;
if (((flags & DSFLIP_WAITFORSYNC) == DSFLIP_WAITFORSYNC) &&
@@ -1293,6 +1294,29 @@
dfb_screen_wait_vsync( dfb_screens_at(DSCID_PRIMARY) );
dfb_surface_flip_buffers( surface, false );
+#else
+ {
+ struct matrox_address address;
+ unsigned int offset;
+
+ offset = surface->back_buffer->video.offset /
DFB_BYTES_PER_PIXEL(surface->format);
+
+ address.device = MATROX_ADDRESS_DEVICE_CRTC1;
+ address.field = -1;
+ address.count = dfb_fbdev->shared->last_count + 1;
+ address.offset[0] = offset;
+
+ if (ioctl( dfb_fbdev->fd, MATROXFB_ADDRESS, &address ))
+ D_ERROR( "DirectFB/Matrox/BES Address ioctl() failed!\n" );
+
+ dfb_surface_flip_buffers( surface, address.count ==
dfb_fbdev->shared->last_count );
+
+ dfb_fbdev->shared->last_count = address.count;
+ }
+
+ if (flags & DSFLIP_WAIT)
+ dfb_screen_wait_vsync( dfb_screens_at(DSCID_PRIMARY) );
+#endif
return DFB_OK;
}
Index: systems/fbdev/fbdev.h
===================================================================
RCS file: /cvs/directfb/DirectFB/systems/fbdev/fbdev.h,v
retrieving revision 1.4
diff -u -r1.4 fbdev.h
--- systems/fbdev/fbdev.h 22 Sep 2005 09:22:01 -0000 1.4
+++ systems/fbdev/fbdev.h 1 Nov 2005 16:21:28 -0000
@@ -43,6 +43,18 @@
#define FBIO_WAITFORVSYNC _IOW('F', 0x20, u_int32_t)
#endif
+#define MATROX_ADDRESS_DEVICE_CRTC1 0
+#define MATROX_ADDRESS_DEVICE_BES 1
+#define MATROX_ADDRESS_DEVICE_CRTC2 2
+#define MATROX_ADDRESS_DEVICE_SPIC 3
+struct matrox_address
+{
+ __u32 device;
+ __u32 field;
+ __u32 count;
+ __u32 offset[6];
+};
+#define MATROXFB_ADDRESS _IOWR('n', 0xFC, struct matrox_address)
typedef struct {
/* fbdev fixed screeninfo, contains infos about memory and type of card */
@@ -76,6 +88,8 @@
unsigned short vendor; /* Graphics device vendor id */
unsigned short model; /* Graphics device model id */
} device;
+
+ __u32 last_count;
} FBDevShared;
typedef struct {
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