> Great ! I got it now !
 
Hurrah!

> * the image on the VGA monitor lacks a few pixel on the right (approx
> 6-7 pixel columns missing): CRTC registers to be adjusted ?
> * the image on the TV lacks even more pixels on the right. I had to
> cheat with GH_ACTIVE, with 773 instead of 720 to be able to get enough
> of the image on the visible area
 
On my machine, the output is perfect -- I've checked the timing on a scope.  There could be more differences between the VT1622 and the VT1622A or there may be something else wrong.  Note that you should _not_ be able to see all 720 pixels: the analogue active line of a PAL TV picture is 702 clocks of 27 MHz so 9 pixels should be hidden at either end.  If you can see all 720 pixels, the active line is either extending into the line blanking period or there is a horizontal squeeze.

> * HSCALE_FAC is not 0, ie. there is an horizontal (down-)scaling clearly
> visible when viewing the moire_2x2.png test image. Could this be the
> 27MHz vs. 28Mhz dotclock effect ? 27MHz should give a wider image than
> 28MHz, that I have to compensate using HSCALE_FAC, which is not perfect.
 
I don't understand this.  I have HSCALE_FAC = 0 and there is no pattening on your moire test image.  If I set HSCALE_FAC to your value, I see extensive banding.
 
Perhaps now you've got it working, you might want to try the original code I sent with just the #define VT1622A changed and see how that turns out?

> Oops : I nearly forgot to tell why my tests were wrong before... The
> round() function in "ht = round(clock / (vt * vsync));" was not working.
[...]
> Maybe "cc
> vt1622-mark_adams.c -lm -o vt1622-mark_adams" is not the exact right
> command ?
 
That's pretty much what I used (except gcc instead of cc).

> Here is the result of the "D" command in the vt1622 program:
 
Here's mine if it's any help:
 
Enter Command Character: D
TVRegs
0x00:   04 00 00 04 00 00 20 4f 84 2a 5a 00 49 44 00 07
0x10:   00 00 a7 1e 63 1c 24 8b 09 2a ee 10 02 80 00 99
0x20:   17 0c 6f 79 48 64 30 93 49 5f 15 a5 23 77 ff 00
0x30:   00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x40:   00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 42
0x50:   5f d0 23 70 02 5f d0 7e 23 94 d0 08 a8 16 00 00
0x60:   00 00 00 5f 03 00 00 00 00 00 00 00 00
CRTCRegs
0x00:   67 59 58 8b 5b 83 6f f0 00 60 1e 00 00 00 00 00
0x10:   5a 33 3f b4 00 40 70 e3 ff 00 00 00 00 00 00 00
0x20:   00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x30:   00 00 01 26 00 00 01 00 22 10 13 01 00 40 00 22
0x40:   00 00 00 00 00 00 00 00 00 03 00 00 4f 01 71 00
0x50:   00 00 40 00 00 00 01 00 11 00 00 00 00 00 00 00
0x60:
CLK1: 26.999997
CLK2: 26.999997
CRTC_HTOTAL     : 00000067 103
CRTC_HEND       : 00000059 89
CRTC_HSTART_BLAN: 00000058 88
CRTC_HEND_BLANK : 0000006b 107
CRTC_HSTART_SYNC: 0000005b 91
CRTC_HEND_SYNC  : 00000003 3
CRTC_VTOTAL     : 0000026f 623
CRTC_VEND       : 0000023f 575
CRTC_VSTART_BLAN: 00000240 576
CRTC_VEND_BLANK : 00000070 112
CRTC_VSTART_SYNC: 0000025a 602
CRTC_VEND_SYNC  : 00000003 3
CRTC_VMAX_SCAN_L: 00000060 96
PLL_N           : 00000063 99
PLL_D           : 0000001e 30
PLL_P           : 00000007 7
PLL_P2          : 00000007 7
PLL_R           : 00000005 5
SUB_CARRIER     : 2a098b24 705268516
SUB_CARRIER_PHAS: 0000026f 623
GH_TOTAL        : 0000035f 863
GH_ACTIVE       : 000002d0 720
GV_TOTAL        : 00000270 624
TH_TOTAL        : 0000035f 863
TH_ACTIVE       : 000002d0 720
START_VIDEO     : 0000004f 79
START_HORIZ     : 00000084 132
START_VERT      : 0000012a 298
TVIDEO_START    : 00000108 264
TVIDEO_END      : 000006a8 1704
THSYNC_WIDTH    : 0000007e 126
TBURST_START    : 00000394 916
TBURST_END      : 000000d0 208
TV_BURST_STEP   : 0000000c 12
VSCALE_FAC      : 00000000 0
HSCALE_FAC      : 00000000 0
SH_TOTAL        : 0000035f 863
CR_AMP          : 0000005a 90
BLACK_LEVEL     : 00000000 0
Y_AMP           : 00000049 73
CB_AMP          : 00000044 68
BLANK_LEVEL     : 00000079 121
HUE             : 00000000 0
INPUT_THRESHOLD : 00000000 0
INPUT_DELTA     : 00000000 0
 
Mark
 
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