gemini-code-assist[bot] commented on code in PR #19915:
URL: https://github.com/apache/tvm/pull/19915#discussion_r3497448827
##########
python/tvm/target/tag_registry/riscv_cpu.py:
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@@ -71,3 +71,14 @@ def _register_riscv_tag(name, config):
"mabi": "lp64d",
},
)
+
+_register_riscv_tag(
+ "riscv/spacemit-k3",
+ {
+ "num-cores": 8,
+ "mtriple": "riscv64-unknown-linux-gnu",
+ "mcpu": "spacemit-x100",
Review Comment:
The SpacemiT K3 SoC is based on the SpacemiT X60 CPU core. LLVM supports
'-mcpu=spacemit-x60', but there is no 'spacemit-x100' CPU target in LLVM. Using
'spacemit-x100' will cause LLVM compilation to fail with an unknown CPU error.
Please update 'mcpu' to 'spacemit-x60'.
```suggestion
"mcpu": "spacemit-x60",
```
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