spectrometerHBH opened a new pull request, #20180:
URL: https://github.com/apache/tvm/pull/20180

   ## Motivation
   
   Calling `K.cta_id_in_cluster(...)` is an explicit request for CUDA 
cluster-launch semantics, including when every cluster extent is one. Lowering 
previously removed extent-one `clusterCtaIdx.*` bindings, and the CUDA runtime 
inferred cluster presence only from dimensions greater than one. As a result, 
an explicit `(1, 1, 1)` cluster launch became indistinguishable from an 
ordinary CTA launch.
   
   ## Changes
   
   - Preserve `clusterCtaIdx.*` launch bindings whenever cluster CTA scope is 
present, including extent-one bindings.
   - Derive a `use_cluster_launch` flag from regular cluster launch-tag 
presence in `LaunchParamConfig`.
   - Emit `CU_LAUNCH_ATTRIBUTE_CLUSTER_DIMENSION` whenever that flag is set, 
including `(1, 1, 1)`.
   - Keep the missing-`clusterCtaIdx` fallback to constant zero for 
compatibility with pre-existing IR.
   - Add lowering, `SplitHostDevice`, and C++ launch-parameter coverage for 
ordinary, singleton, multi-CTA, and preferred-cluster cases.
   
   This does not change serialized module metadata. Preferred-cluster tags 
alone do not request a regular cluster launch.
   
   ## Launch behavior
   
   NCU 2026.1 measurements on NVIDIA B200:
   
   | Probe | Cluster dimensions | Cluster Size | Uses Blocks as Clusters |
   |---|---:|---:|---:|
   | Ordinary CTA | `(0, 0, 0)` | 0 | 0 |
   | Explicit singleton | `(1, 1, 1)` | 1 | 0 |
   | Explicit multi-CTA | `(2, 1, 1)` | 2 | 0 |
   
   ## Validation
   
   - TVM build completed successfully.
   - LowerTIRx cluster/preferred-cluster tests: 6 passed.
   - SplitHostDevice launch tests: 6 passed.
   - `LaunchParamConfig` C++ test: 1 passed.
   - Relevant CUDA cluster codegen tests: 2 passed.
   - Downstream affected correctness matrix: 278/278 passed without skips:
     - amax: 59
     - fast top-k: 34
     - dense SwiGLU: 75
     - interleaved quant: 58
     - grouped dGLU: 52
   - Staged-file pre-commit checks passed.
   
   Downstream B200 benchmarks used Proton timing, five independent samples per 
implementation, one-second cooldowns, reference implementations enabled, 
interference monitoring, and no sample splicing:
   
   | Matrix | Passing rows | Minimum `mean(reference) / mean(tirx)` |
   |---|---:|---:|
   | Targeted affected-family gate | 15/15 | 0.996504 |
   | Full amax matrix | 88/88 | 0.997440 |
   | Full fast top-k matrix | 34/34 | 1.006541 |
   
   The maximum patched-versus-main TIRx slowdown in the targeted comparison was 
0.911%, below the 1% investigation threshold. Six externally interfered amax 
attempts were recorded and replaced only by complete five-round row reruns.
   
   A full TIRx suite run was also performed. The strict kernel registry passed. 
The broad parallel run encountered unrelated environment/reference failures 
from cross-device DLPack state, aggregate GPU memory pressure, a missing 
optional `cutlass.experimental` package, and reference PTX incompatibility. An 
isolated core rerun produced 2631 passed, 73 skipped, 3 xpassed, and one 
pre-existing stale packed-dtype error-message assertion; no affected cluster 
correctness configuration failed.
   


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