cchung100m commented on PR #19900: URL: https://github.com/apache/tvm/pull/19900#issuecomment-5511501457
Hi @tlopex Thanks for catching this. I've now swapped `nthread_by` onto `blockIdx.x` for CUDA at all four sites - a pure relabeling of the te.thread_axis tag with no new index arithmetic - while leaving `nbx`/`nbz` on the bounded axes and the non-CUDA mapping untouched. Rather than fusing batch and width-block via `indexmod`/`indexdiv` as suggested, a plain swap gives the same safety guarantee without introducing new arithmetic into the mergesort inner kernel; I have added test cases to cover large-batch sort/topk on CUDA going forward. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected] --------------------------------------------------------------------- To unsubscribe, e-mail: [email protected] For additional commands, e-mail: [email protected]
