Are there any numbers on FPGA utilization? Some folks at NTT built an SDR platform with 3 boards that each contain 2 1M gate FPGAs. Max utilization was 33% on 802.11 receiving [1,2]. I'm wondering how the USRP compares.
1. http://www.ntt.co.jp/tr/0307/files/ntr200307015.pdf 2. http://www.ntt.co.jp/tr/0307/files/ntr200307024.pdf -Rahul -- Rahul Dhar [EMAIL PROTECTED] Actually, my goal is to have a sandwich named after me.
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