Bdale Garbee wrote:
> Looking at options for locking all the clocks that are part of the EME
> station I'm building to my HP 58503A GPS-synced clock.  Searching the
> list archives, I found this note from Matt regarding the external clock
> input on the USRP:
> 
> http://lists.gnu.org/archive/html/discuss-gnuradio/2005-03/msg00030.html
> 
> Has anyone played with this?  
> 
> Of particular interest is whether anyone has hacked the FPGA code to use
> the internal PLLs to retain a 64 Mhz sample clock using a 10 Mhz
> reference clock input to the board.

There are a couple of problems here.  First, the PLLs in the PFGA are
extremely noisy, and are only useful for digital clocks.  But even if
they weren't, the ADC/DAC chips are hooked directly to the input clock,
so the FPGA can't drive those lines.

Are you sure you need a 64 MHz sample clock for your app?

Matt


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