On Fri, Nov 11, 2005 at 12:02:18PM -0500, [EMAIL PROTECTED] wrote:
> No I have not yet made that change. I have been trying to figure out how
> to use it. I don't understand the brief description
>
> /*!
> * \brief Enable/disable automatic DC offset removal control loop in FPGA
> *
> * \param bits which control loops to enable
> * \param mask which \p bits to pay attention to
> *
> * If the corresponding bit is set, enable the automatic DC
> * offset correction control loop.
> *
> * <pre>
> * The 4 low bits are significant:
> *
> * ADC0 = (1 << 0)
> * ADC1 = (1 << 1)
> * ADC2 = (1 << 2)
> * ADC3 = (1 << 3)
> * </pre>
> *
> * By default the control loop is enabled on all ADC's.
> */
>
> bool set_dc_offset_cl_enable(int bits, int mask);
> I don't know what to use for bit or mask values. Is this like the mux
> values? Please explain how you determine the bit and mask values to use?
Hi Mike,
Many places in the code we use a pair of arguments with names like
"bits and mask" or "val and mask". This pattern allows us modify only
a subset of the bits in a given target word or register.
Assuming that "reg" is the value we are modifying, the result is
equivalent to
reg = (reg & ~mask) | (bits & mask)
We use this pattern because it allows us to atomically implement the
read/modify/write on for example the FPGA, where it's safe even in the
face of multiple processes trying to modify different bits in the same
register.
Eric
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