On Thu, Jan 05, 2006 at 11:22:19AM -0500, Elaine Garbarine wrote: > Hello again, > > Now that I finally have my GNU Radio installations working properly I've got > some questions about the USRP that I'm hoping you guys could help me out > with. I want to develop a system using the USRP in conjunction with a DSP > board to build a Software Defined Radio testbed. I'm curious if the USRP > has any sort of memory at all. I need to be able to buffer at least one > packet (not sure how big that will be just yet) while I do a bit of > processing on the FPGA before farming the data out to my DSP for further > processing.
The USRP has some memory. It's in the ram blocks in the FPGA. We're currently using a little more than 50% of it, and it's almost all for buffering packets on their way to/from the FX2. Yes, it buffers more than 1 (USB) packet. > Also, could you guys tell me if it would be at all possible to modify the > Verilog code such that it sends and receives data over a group of the GPIO > pins accessible via the headers on the Daughterboards instead of sending the > data out of the USB2.0 interface? Yes. It is possible. It's a "Simple Matter of Programming (TM)" The top level of the verilog source for the FPGA can be found here: usrp/fpga/toplevel/usrp_std/usrp_std.v The bulk of the code is here: usrp/fpga/sdr_lib/*.v > Many thanks for all of the help you guys have provided. You're welcome! > -Elaine Garbarine Have fun! Eric _______________________________________________ Discuss-gnuradio mailing list [email protected] http://lists.gnu.org/mailman/listinfo/discuss-gnuradio
