Hello..
i am wondering how carrier sense could be implemented on USRP....
can those PLLs on FPGA be brought to some use?
 
Can I do something on the lines of takeing running average
Will constantly keep a track of  the incoming samples of the received signals...
calcuate the running average and
Will decide some noise floor/threshold for decision...
 
I hve very less knowledge of digital signal processing...
will this idea work?
 
thanks,
amit
 
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