On Mon, Jul 10, 2006 at 08:22:29PM -0700, Oussama Sekkat wrote: > Hello everybody, > > I am still a beginner in the project so bare with me if my questions have > obvious answers. > I was looking at the verilog code for usrp_std.v module. that module > containes the tx_chain.v module which uses a module called phase_acc.
Actually, if you look at that line, you'll see that it's within an `ifdef that's not enabled. Take a look again ;) > I am not sure what this later module does? It takes as inputs (among others) a > 7bit serial address and 32 bit serial data and outputs the 32bit phase. > Does anyone have any idea what that module does and what its purpose is in > the tx_chain? If enabled, this code would implement digital upconversion in the FPGA, instead of using the DUC in the AD9862. N.B., this code hasn't been tested in something like a couple of years and may have suffered bit rot. [Definitely. The FPGA register definitions that would have been required to use it have been removed...] Eric _______________________________________________ Discuss-gnuradio mailing list [email protected] http://lists.gnu.org/mailman/listinfo/discuss-gnuradio
