On Mon, Nov 06, 2006 at 03:14:44PM -0500, Chuck Swiger wrote:
> On Mon, 2006-11-06 at 09:34 -0800, Eric Blossom wrote:
> > Chuck,
> > 
> > Can you please remind me where the ATSC Rx porting effort got stuck?
> > What's the immediate problem that needs to be solved?
> 
> Everything from antenna to the "bit timing loop" can be done in
> 2.x, including fpll.  The bit timing loop, field sync checker,
> equalizer and demultiplexor do not work in 2.x, altho a vain attempt
> at porting has been checked in. Those "compile and run" but are broken.
> The "grind on the data" modules that don't really have anything
> to do with signal processing are all ported to 2.x: de/randomizer,
> rs-de/encoder, de/interleaver and trellis/viterbi all qa test and
> work great.
> 
> On the transmit side, field sync mux, symbol mapper and weaver
> modulator head/tail are not ported.
> 
> So the immediate issue is getting bit-timing-loop finished, or
> starting over on it correctly.
> 
> --Chuck

Thanks!


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