On 3/6/07, [EMAIL PROTECTED] <[EMAIL PROTECTED]> wrote:
Yes, I thought about simulations today. Apparently Verilog is designed to facilitate that aswell. Should I do these simulations with for example Altera's Quartus II?
If you want to simulate Verilog, there are free tools available along with an Altera ModelSim version that is also "free" from their website. To clarify, I didn't mean FPGA/hardware simulations, but more like a high level GNU Radio block level simulation. Taking a bunch of signals and creating a pseudo channel that you may encounter, truncating to an ADC value, filtering, etc. Just to see what kind of performance you were looking for. Brian _______________________________________________ Discuss-gnuradio mailing list [email protected] http://lists.gnu.org/mailman/listinfo/discuss-gnuradio
