Your suggestion worked to fix the compilation problem, along with the
addition of a line for atr_delay.v, however, I'm not able to load the
newly compiled rbf file into the usrp, and the error leads me to believe I
need to take a step back and make sure I'm working with the right files.
When I copied the newly compiled usrp_multi.rbf to
share/usrp/rev2/, I get the following error with the
verbose environment variable turned on:
usrp: firmware ...share/usrp/rev2/std.ihx loaded successfully.
Can't find fpga bitstream: multi_usrp_test.rbf
even though I specified the name "multi_usrp_test.rbf" in the python code.
So on a hunch I changed the name of the rbf file to std_4rx_0tx.rbf,
adjusted my python code appropriatly, and now it loads but I get the
following:
usrp: firmware .../share/usrp/rev2/std.ihx loaded successfully.
usrp: fpga bitstream ...share/usrp/rev2/std_4rx_0tx.rbf loaded successfully.
This code requires an FPGA build with 4 DDCs. This FPGA has only 2.
So now my question is, to test the multiple receive capability of the
usrp, exactly which project file (in which directory) do I need to load
into Quartus, do I need to modify it to enable 4 receive ddc's, and once
it compiles, what do I do with it? Where do I put it and how do I name
it? Why does it need to be named exactly one way and not another?
thanks,
eric
On Mon, 8 Oct 2007, Eric Blossom wrote:
On Mon, Oct 08, 2007 at 08:08:20PM -0400, [EMAIL PROTECTED] wrote:
Just as an update, I downloaded revision 6599 and tried again, no change
in the result. I then tried to compile usrp_std.qpf, and that did work;
it produced 11,496 total logic elements for a utilization of 95%, so I
think the Quartus software is working correctly.
From this it would appear that usrp_multi needs to be updated?
Sounds that way.
I may just be missing a verilog file from the project file
usrp_multi.qsf. Try adding the line below:
[EMAIL PROTECTED] usrp_std]$ grep cic_dec_shifter *
usrp_std.qsf:set_global_assignment -name VERILOG_FILE
../../sdr_lib/cic_dec_shifter.v
Eric
On Mon, 8 Oct 2007, [EMAIL PROTECTED] wrote:
Ok, I installed the latest Quartus II ver. 7.2 software onto a virtualized
WinXP guest hosted by a Linux x86_64 system running kvm/qemu. I
downloaded a recent revision of gnuradio (revision 6595) onto the host.
I started Quartus, and using a samba connection between the virtual guest
and the Linux host I opened the usrp_multi.qpf project file in:
usrp/fpga/toplevel/usrp_multi
Not knowing anything about Quartus, I took a guess and hit "Start
Compilation" under the Processing menu.
The compilation begins, a lot of green and blue lines go by including many
"Elaborating entity...", but after a short while the compilation fails
with an error:
"Error: Node instance "cic_dec_shifter" instantiates undefined entity
"cic_dec_shifter"
The line just before this, says:
"Info: Elaborating entity "sign_extend" for hierarchy
"rx_chain:rx_chain_0|cic_decim:cic_decim_i_0|sign_extend:ext_input"
Not sure what to do at this point....
thanks,
eric
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