On Fri, Aug 1, 2008 at 6:31 PM, Eric Brombaugh <[EMAIL PROTECTED]> wrote:
>
> On Aug 1, 2008, at 1:58 PM, Philip Balister wrote:
>>>
>> I've been talking to a friend (he knows FPGA stuff much better than
>> me) about using the expansion port to communicate with an FPGA via a
>> SDIO interface. I don't think we can beat the current USRP data rate,
>> but we should be able to reduce the latency introduced by the USB
>> interface.
>
> Looks like the SDIO ports run up to 50MHz and have 8-bit wide data. No idea
> how much overhead there is in that, but it might be able to go a bit faster
> than USB2.0 and as you note would have a lot less latency. Hook up to a
> decent FPGA and you could cram a bit of external pre-processing in as well.
> I picked up one of the Avnet Xilinx Spartan 3A boards for $50 that would
> probably work well for that.

We are hoping to create a board with a reasonable FPGA that works with
existing USRP daughterboards. This would make a really neat system for
small SDR nodes. I'll be sure to keep you updated on out progress.

Using an existing dev board for developing the beagle to FPGA
interface is a really good idea, thanks for suggesting it!

Philip


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