On Tue, Sep 23, 2008 at 11:04 AM, Sebastiaan Heunis <[EMAIL PROTECTED]> wrote:
> Hi
>
> I have a few questions to ask about the ADC if anyone could please
> help me? I know that it has a 12-bit output, so our output is between
> 0 and 4095. I would just like to know how this ADC input gets
> converted after leaving the adc_interface block in the FPGA. In other
> words, how are positive and negative numbers represented, etc? The
> FPGA converts the 12bit input to a 16bit output. What is done to get
> it from the 0-4095 input to a 16bit output with + and - numbers?
>From the AD9862 datasheet, page 23:
The Rx data output format can be configured for either twos
complement or offset binary. This is controlled by the Rx Twos
Complement register.
So you are getting the twos compliment already from the ADC.
The extra bits comes from decimation and mixing. It is originally
extended in the adc_interface.v here:
http://gnuradio.org/trac/browser/gnuradio/trunk/usrp/fpga/sdr_lib/adc_interface.v#L34
Note the sign bit concatenated with the whole value then zero-extended
by 3 bits of 0's. The later decimation filtering helps make the zero
extension valid.
Hope this helps.
Brian
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