On Sun, Feb 01, 2009 at 12:30:58AM -0500, Paul Creekmore wrote:
> The FPGA on USRP1 sends an extra two bits of data with each 16-bit word  
> (to the FX2 chip).  If I'm not mistaken, the first bit is set when  
> accompanying a sample from rx channel 0, and the second bit is set when  
> accompanying an inphase (as opposed to quadrature) sample (presumably  
> from channels 0, 2, 4, or 6).
>
> * What significance do these two bits have in the handling of the data  
> after the FPGA?
>
> I'm trying to figure out how best to set these bits in the case of  
> packed samples at lower quantization levels.
>
> Thanks,
> Paul

Uhh, what two extra bits?  The GPIF bus is 16-bits wide...

The FPGA does report two status bits (independent of the data bits)
that indicate whether (1) it has room for a new packet from the FX2
and (2) if it has a packet available for the FX2.  I don't think
anything you're doing should have anything to do with how those flags
are generated.

Did this help?

Eric


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