I am trying to modify the fpga verilog code for usrp1. I have installed Quartus-II on windows. does anyone know how to build the code? is there a project file?

I need a single Tx and Rx channel(both I-Q). can I modify the verilog code along the lines of inband1rxhb_1tx.rbf ?
This would free up some space on the fpga for my code.

thanks
-Rushikesh


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