On Thu, Jan 14, 2010 at 10:52, Yan Nie <[email protected]> wrote: > I'm trying build my own fpga bitstream by modifying usrp_sounder project. > I've saveral questions on the module master_control.
The master_control module is actually a common file with the standard build, not specific to the usrp_sounder image. > what store in reg_0, reg_1, reg_2, and reg3? These are driven in master_control and connected to io_pins. They are either GPIO outputs configurable from the host, debug outputs, or used as daughterboard control signals. > Can I monitor the signal from io_tx pins in daughter board by oscilloscope? Yes. > What the difference of the two group of io_tx pins? There is a bus of these for each side of the USRP. Johnathan _______________________________________________ Discuss-gnuradio mailing list [email protected] http://lists.gnu.org/mailman/listinfo/discuss-gnuradio
