On 03/02/2010 08:21 AM, Yan Nie wrote:
Dear all,


I wanna apply a series of signal generated from the signal generator as
a input of the LFRX daughterboard to test my FPGA configuration for at
the receiver side. I'm wondering what the power limitation of the LFRX
daughterboar is?


+10 dBm will clip, more than +17dBm could cause damage.

Matt


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