I tried to download the repository from the link given below, but the connection timed out. I found the project on sourcerepo ( http://code.ettus.com/redmine/ettus/projects/show/fpga), and also tried the link given there also timed out.
gnura...@gnuradio-laptop:~$ git clone git:// ettus.sourcerepo.com/ettus/fpga.git Initialized empty Git repository in /home/gnuradio/fpga/.git/ ettus.sourcerepo.com[0: 68.233.8.98]: errno=Connection timed out fatal: unable to connect a socket (Connection timed out) gnura...@gnuradio-laptop:~$ git clone git://git.ettus.com/ettus/fpga.git Initialized empty Git repository in /home/gnuradio/fpga/.git/ git.ettus.com[0: 68.233.8.98]: errno=Connection timed out fatal: unable to connect a socket (Connection timed out) Any help here would be greatly appreciated. -Michael Berman On Tue, Mar 2, 2010 at 12:14 AM, Jared Casper <[email protected]> wrote: > On Mon, Mar 1, 2010 at 11:33 PM, Michael Berman <[email protected]> > wrote: > > It appears that the entire USRP2/FPGA directory was removed from the > > repository on 2/28/2010. > > > > Was this an error, or is the Verilog code no longer going to be posted? > > > > From the git log: > > Revision a2c00f5c > > ID: a2c00f5cff7407ff10fc6c812d06fefe52c0b6a3 > Added by Johnathan Corgan 1 day ago > > Remove usrp1 and usrp2 FPGA files. These are now hosted at: > > git://ettus.sourcerepo.com/ettus/fpga.git > > ...under the 'usrp1' and 'usrp2' top-level directories. > > Jared > -- -Michael Berman
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