Hi Doug,
Thanks for the quick reply.
In rx_timed_samples I basically do start_rx_streaming() right after
set_time_at_next_pps(), so yeah, I'll try the sleep(1). What do you mean
by "if the host PC doesn't have direct access to the PPS signal" (read
the serial data from the GPS)?
Yes, I've read a bit about the phase offsets stuff, especially the post
from Matt about ambiguities, but at the moment I'm in a learning phase,
and a bit vague about what this means (and also no DSP guru!). I can see
that the RFX boards PLL may start up at an (phase) offset regardless,
but not sure how this would actually affect the sampling/ticks.
Also, as you say, you can split the signals, so why the MIMO cable? I'll
do this then, its a lot simpler anyway.
Kind Regards,
David
Doug Geiger wrote:
On 3/19/2010 10:48 AM, David Evans wrote:
Hi,
I want to sync two USRP2s, and currently trying to modify the VRT
rx_timed_samples...
usrp2::clock_config_t cc;
cc.ref_source = usrp2::clock_config_t::REF_INT;
cc.pps_polarity = usrp2::clock_config_t::PPS_NEG;
cc.pps_source = usrp2::clock_config_t::PPS_SMA;
cc.provide_ref_to_mimo = false;
u2->config_clock(cc);
// u2->set_time(....); // replaced with...
u2->set_time_at_next_pps(...);
However, the code hangs at the start sampling, and manually applying
a pulse to the PPS SMA does nothing.
What is the correct voltage level and pulse shape required? Manually
toggling anything between 0-1.5v and 0-5v does nothing. I hope 5V
isn't too much!!!
When do you start_rx_streaming()? I've found that it works best to
wait until the next PPS (e.g. sleep(1) if the host PC doesn't have
direct access to the PPS signal), and then calling
start_rx_streaming() with the desired parameters (i.e. start streaming
at current time + some offset) works.
Ultimately, I want to capture coherent samples with both USRPs, maybe
with the MIMO cable, and a GPS reference + PPS. Would this be just a
case of...
For USRP A (with ref + PPS attached)...
cc.ref_source = usrp2::clock_config_t::REF_EXT;
cc.pps_polarity = usrp2::clock_config_t::PPS_NEG;
cc.pps_source = usrp2::clock_config_t::PPS_SMA;
cc.provide_ref_to_mimo = true;
For USRP B...
cc.ref_source = usrp2::clock_config_t::REF_EXT; ***MIMO???***
cc.pps_polarity = usrp2::clock_config_t::PPS_NEG;
cc.pps_source = usrp2::clock_config_t::PPS_SMA; ***MIMO???***
cc.provide_ref_to_mimo = false;
Kind Regards,
David
I haven't tried the MIMO cable at all, but sync'ing by providing the
same clock/PPS to both USRP2's works pretty well. You may also want
to review some of the recent discussions on mailing list about the
possible phase offsets you may get, even when all/both USRP2's are
locked to the same reference, and internal clocks are synchronized.
This is due to the implementation of the PLL on the individual
daughterboards, and thus will be dependent on what you're using.
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