You need to change the locations of the Verilog files in the code, as
the compiler cannot find them....
~Jeff
On 7/21/2010 4:57 AM, John Wu wrote:
Hi all, I use Qartus II version 9.1 web edition to compile fpga code,
meet a lot of error.
I enter "D:\fpga\usrp1\toplevel\usrp_inband_usb" then open
"usrp_inband_usb.qpf" then I compile this project. error below:
Error (10054): Verilog HDL File I/O error at adc_interface.v(3): can't
open Verilog Design File "../../firmware/include/fpga_regs_common.v"
Error (10054): Verilog HDL File I/O error at adc_interface.v(4): can't
open Verilog Design File "../../firmware/include/fpga_regs_standard.v"
--
~Jeffrey Lambert, K1VZX
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