On Fri, Jul 23, 2010 at 12:31:19PM -0700, Ashish Bansal wrote:
> Hi,
> I am trying to understand the data flow in the FPGA. I am trying to
> understand the Architecture and aemb firmware program control flow.
> Which one is the top level firmware "C" file. How it gets data from ADC. How
> it interacts with the UART etc.Please let me know some details on it.
> Thanks
> JS
txrx.c is the top-level C file.
memory_map.h describes the various peripherals that the firmware sees.
Most of the magic occurs in the buffer pool which can simultaneously
accept input from 4 sources, send output to 4 destinations, and
includes a full cross bar and 8 buffers. AFAIK, there's no overview
documentation on it, but between memory_map.h, buffer_pool.{h,c}, and
dbsm.{h,c} you may be able to sort it out.
Eric
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