On Sep 25, 2010, at 10:41 AM, [email protected] wrote:
> We would have used 13 MHz, but the USRP-1 FPGA code fails to transmit for 
> clock rates below about 48 MHz.

Does anybody know why this is?



-- 
Mark J. Blair, NF6X <[email protected]>
Web page: http://www.nf6x.net/
GnuPG public key available from my web page.





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