On Sun, Jul 01, 2012 at 04:01:48PM -0400, Andrew Davis wrote:
>
> So my plan is to somehow remove at least one stage of filtering from
> the FPGA so I can sample at ~4MSPS and have all out of band signals
> aliased into that bandwidth. My questions is can this be done and is
> my DSP info correct ( Can this work? ).

I used that trick to sniff all Bluetooth channels with a single USRP2 a
few years back.  I described the technique in this talk at ShmooCon 2009
(179 MB):

http://shmoocon.org/2009/videos/Bluetooth-Ossman.m4v

I don't think you'll have to hack a daughterboard like I did, so you'll
only need to work on the FPGA.  My old FPGA mod is here:

http://gr-bluetooth.git.sourceforge.net/git/gitweb.cgi?p=gr-bluetooth/gr-bluetooth;a=blob_plain;f=doc/usrp2_alias.patch;hb=HEAD

It is out of date, but you should be able to get the idea.  I just had
to zero out some filter coefficients.

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