Ok, i should put more info. I have USRP and WBX., and I designed receiver
for operating withing 434 MHz.
Since I am more hardware oriented electrical engineer, I didn't know how to
make it in "correct" way, and there are a few blocks there
that are based on simulating hardware that I know how functionate. So, I
use sampling frequency of 500k, and after demodulator, I have a block that
works literally as diode min max circuit and is usually implemented in some
receivers. That block, extracts threshold (which is half way between min
and max). After that, the same input is compared to threshold signal in
order to derive signal that has only zero level and one level (so digital
signal). Derived "digital" signal is sent to something that I call clock
syncronizer, and there I search for the edges in order to allign my
sampling period, and I do sampling in order to get symbol values.
So my question is what would be the correct way to design this, because I
think that my approach is definately not correct one and in my opinion too
robust.


On Fri, Dec 6, 2013 at 12:22 PM, Marcus Müller <[email protected]> wrote:

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>
> Hi Nemanja,
>
> uff, that's quite a lot of text I hardly understand.
> Could you please confirm:
>
> * You want to design a receiver
> * the receiver should have an Analog-to-digital converter
> * You already have a design for mixing from RF to baseband
>
> The rest I don't understand. What is your question? How is it related
> to GNU Radio?
> But it really does sound exciting!
>
> Greetings,
> Marcus
>
> On 06.12.2013 11:26, Nemanja Savic wrote:
> > Hi all guys,
> >
> > this time :), my question is regarding soem reference book or any
> > other kind of literature, where I can find about how digital
> > receiver should be designed regarding sps. Namely, my current
> > receiver is more or less simulation of some analog circuitry that I
> > understand better than DSP. For example, after demodulation I use a
> > block that is apprximation of diode min max circuit for setting the
> > right threshold for getting dgital signal out of "analog"
> > demodulator output. After that my bit slicer works more or less
> > like the one found in the UART. For this reasons, the signal needs
> > to be highly oversampled, for example, symbol rate is 19.2kb and I
> > use sampling frequency of 500ksps. When lowering sampling frequency
> > to 250ksps, the performance of the receiver degrades a lot, plus
> > probably to many processing effort than it should be.
> >
> > Thanx,
> >
> >
> >
> > _______________________________________________ Discuss-gnuradio
> > mailing list [email protected]
> > https://lists.gnu.org/mailman/listinfo/discuss-gnuradio
> >
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-- 
Nemanja Savić
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