> To me, the wrapping and passing of digital samples seems to put a
> stack within the stack. The ends of the chain are unaware of the internal
> message passing and act as if the samples were directly passed to the DAC
> and ADC, ...

Yes, and ? These are un-related stacks.

Some highend DAC/ADC have high speed serial interfaces and
encode/packetize the data before sensing them to the CPU/FPGA/ASIC
that will deal with the samples, would you consider that a PHY
emulation as well ? The way the samples are transported from one
endpoint to the other is largely irrelevant here ...

Cheers,

   Sylvain

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