On 12/04/2014 11:33 PM, Vanush Vaswani wrote: > How does the system know that the downstream block is on host or FPGA?
We have our own blocks for processing on the FPGA. They handle the command & control of the FPGA and the transport. M > > On Fri, Dec 5, 2014 at 8:58 AM, Nowlan, Sean > <[email protected]> wrote: >> >> >>> Ettus Research is very excited to announce the release of RFNoC! >> >> >> >> […] >> >> >> >> This is very cool. I’ve been looking forward to working with this >> development. >> >> >> >>> Mixing and matching host-based and FPGA-based processing is transparent to >>> the user, and that processing can scale across multiple FPGAs and devices >>> across a network >> >> >> >> Does this imply that I could run a GNU Radio application on a Zedboard, for >> instance, with the following data flows: >> >> >> >> (1) GR on Zynq ARM --> Zynq FPGA --> GR on Zynq ARM --> B2x0 RF/radio >> >> (2) GR on Zynq ARM --> Zynq FPGA --> GR on Zynq ARM --> X3x0 FPGA --> X3x0 >> RF/radio >> >> >> >> I think (1) is similar or identical to Jonathon Pendlum’s FPGA filter demo. >> What I’m more curious about is how easy it is to build a single GR flowgraph >> that mixes GR processing with FPGAs that live either in Zynq or connected >> 3x0 series devices. It sounds like this kind of support is an explicit goal >> of RFNoC. >> >> >> _______________________________________________ >> Discuss-gnuradio mailing list >> [email protected] >> https://lists.gnu.org/mailman/listinfo/discuss-gnuradio >> > > _______________________________________________ > Discuss-gnuradio mailing list > [email protected] > https://lists.gnu.org/mailman/listinfo/discuss-gnuradio > _______________________________________________ Discuss-gnuradio mailing list [email protected] https://lists.gnu.org/mailman/listinfo/discuss-gnuradio
