This might be a more appropriate discussion for usrp-users.
Be that as it may: DC-offset correction in the FPGA simply looks at the running average of the +ve and -ve samples, and makes adjustments to have them converge towards zero. For I/Q amplitude/phase balance, the host-side code has a set of utilities for making measurements, and then there are simple corrections that can be applied in the FPGA, but the FPGA isn't responsible for making the measurements. Look at the UHD_CAL_RX_IQ_BALANCE and related utilities. The host-side sends tones, and measures the received values to determine any phase/amplitude corrections that need to be applied. On 2015-04-14 10:24, 弓长张 wrote: > hello! everyone! > what's the algorithm of the IQ dc offset ,IQ phase and amplitude > calibration?I find the part in usrp fpga code,but I don't understand how it > works?Is there any documentions ? > > _______________________________________________ > Discuss-gnuradio mailing list > [email protected] > https://lists.gnu.org/mailman/listinfo/discuss-gnuradio [1] Links: ------ [1] https://lists.gnu.org/mailman/listinfo/discuss-gnuradio
_______________________________________________ Discuss-gnuradio mailing list [email protected] https://lists.gnu.org/mailman/listinfo/discuss-gnuradio
