Another possibility is to look at the HMM patches for Linux to reduce
OpenCL copy load. I read the patches were proposed for 4.11 but didn't
make it into that revision.
On Wed, 2017-04-26 at 07:01 -0400, GhostOp14 wrote:
> Thanks Marcus! I have been going back and forth with testing still
> within the OpenCL framework versus straight FPGA with an interface.
> Where OpenCL starts to fall down from a speed improvement
> persepective for signal processing is when the data streams have to
> be processed sequentially due to the algorithms (like a feedback
> loop). So I wanted to try to get some blocks like a Costas Loop onto
> hardware. I tested it as a single task in OpenCL on a GPU and the
> performance was horrible so I want to get the same algorithm running
> on an FPGA and see if the performance significantly improves.
>
> Given some high-bandwidth goals, I'm actually thinking either USB 3.0
> or PCIe would be the requirement. I was looking at the Opal Kelly
> line like the one they have based on the Xilinx Artix-7. I actually
> think the USB 3.0 interface if I can transfer runtime data to/from it
> at USB 3.0 speeds would be more portable (say laptop/desktop). I'm
> still new to FPGA's so any other thoughts are much appreciated. It
> looks like I may still have to work in Vivado and build the FPGA code
> but then I could interface with it from C++ and a GNURadio block?
>
> Am I on the right track?
>
> ---------- Forwarded message ----------
> From: Marcus Müller <[email protected]>
> Date: Wed, Apr 26, 2017 at 6:52 AM
> Subject: Re: [Discuss-gnuradio] OpenCL FPGA Recommendation?
> To: GhostOp14 <[email protected]>
>
>
> Hi Ghost,
> would you mind sending that mail to the mailing list instead of me in
> private? I'm certainly not the only one that can contribute something
> to this, and it would probably help you most if the others get a
> chance to contribute their thoughts, too.
> Thanks,
> Marcus
>
> On 04/26/2017 12:50 PM, GhostOp14 wrote:
> > Thanks Marcus! I have been going back and forth with testing still
> > within the OpenCL framework versus straight FPGA with an
> > interface. Where OpenCL starts to fall down from a speed
> > improvement persepective for signal processing is when the data
> > streams have to be processed sequentially due to the algorithms
> > (like a feedback loop). So I wanted to try to get some blocks like
> > a Costas Loop onto hardware. I tested it as a single task in
> > OpenCL on a GPU and the performance was horrible so I want to get
> > the same algorithm running on an FPGA and see if the performance
> > significantly improves.
> >
> > Given some high-bandwidth goals, I'm actually thinking either USB
> > 3.0 or PCIe would be the requirement. I was looking at the Opal
> > Kelly line like the one they have based on the Xilinx Artix-7. I
> > actually think the USB 3.0 interface if I can transfer runtime data
> > to/from it at USB 3.0 speeds would be more portable (say
> > laptop/desktop). I'm still new to FPGA's so any other thoughts are
> > much appreciated. It looks like I may still have to work in Vivado
> > and build the FPGA code but then I could interface with it from C++
> > and a GNURadio block?
> >
> > Am I on the right track?
> >
> >
> >
> >
> > On Wed, Apr 26, 2017 at 3:03 AM, Marcus Müller
> > s.com> wrote:
> > > Hey,
> > >
> > > just a general recommendation: you might want to define a few
> > > edge specs
> > > of your accelerator first – I'd start with the acceptable
> > > interfaces to
> > > a PC (I think that brings it down to PCIe cards and FPGA/CPU SoCs
> > > pretty
> > > much).
> > >
> > > Then: You might want to consider why specifically you want to use
> > > an
> > > FPGA to do openCL (as opposed to, say, a GPU), to further
> > > restrict the
> > > field; that might rule out one of the two options above.
> > >
> > > Best regards,
> > > Marcus
> > >
> > > On 25.04.2017 19:15, Ghost Op wrote:
> > > > Hi everyone! I'm working on expanding the OpenCL modules for
> > > GNURadio
> > > > and I want to test them with some FPGA's that support OpenCL.
> > > There's
> > > > a few from Xilinx and Altera it looks like, but the ones I've
> > > seen are
> > > > a bit pricey.
> > > >
> > > > Does anyone know of an OpenCL-capable FPGA card for under
> > > $1,000 for
> > > > some testing?
> > > >
> > > > _______________________________________________
> > > > Discuss-gnuradio mailing list
> > > > [email protected]
> > > > https://lists.gnu.org/mailman/listinfo/discuss-gnuradio
> > >
> > >
> > > _______________________________________________
> > > Discuss-gnuradio mailing list
> > > [email protected]
> > > https://lists.gnu.org/mailman/listinfo/discuss-gnuradio
> > >
>
> _______________________________________________
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> [email protected]
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