Hello Philipp,
Your email would be best directed to the usrp-users mailing list or
supp...@ettus.com as this is the community discussion list for GNU Radio.
However, I can say that the USRPs do not currently have a metadata flag
for detecting ADC overloads. I believe that the ADC itself does not have
overload detection. Adding such a flag would require adding HDL to the
FPGA to check for max ADC values and setting a flag in a register upon
detecting an overload. Your application could then read that register at
intervals to check for overloads. With RFNoC that would be a small to
moderate development effort for someone familiar with HDL development.
Regards,
Derek
On 17/01/2019 09:16, Hillenbrand Philipp (CR/ARE1) wrote:
Hello Support Team,
Is there any chance to detect an ADC overload through the python API.
In my case, I am receiving an unknown input signal.
The software should be able to find the highest possible RX gain value
on its own, but the ADC should stay in the linear range.
Unfortunately, my connection is too slow to stream the 200 MSample raw
signal to the Laptop. Is there any flag that can be checked to avoid
ADC clipping?
I would like to do a method like:
-Check if ADC is in overload
-If yes: decrease gain
-If No: increase gain
My System
·X310 with two TwinRX daughterboards, GPSDO
·Connection to laptop: single Gigabit Ethernet
·Sample Rate: 2e6, Center Frequency: 100e6, Possible Gain Twin RX: 0-95
·Oscillator and time base comes from GPSDO, all channels are tuned
manually for coherent operation
·UHD Version 3.10.003.001 FPGA version 35
·Python 3.7
Best regards
Philipp
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