Roots of SD and toolchain have been aligned? Thanks a lot. Ivan
Il 02.01.2020 08:56 Michael West ha scritto: > Happy New Year! UHD 3.15.0.0 is now available! This is an API release. It is not API or ABI compatible with earlier releases. This release includes several new features and bug fixes. > > Installers for Windows and Fedora are available here: > http://files.ettus.com/binaries/uhd/uhd_003.015.000.000-release/ [1] > > The PPA for Ubuntu can be found here: > https://launchpad.net/~ettusresearch/+archive/ubuntu/uhd [2] > > The tag for this release is located here: > https://github.com/EttusResearch/uhd/releases/tag/v3.15.0.0 [3] > > There have been 317 commits since the last API release which can be viewed here: > https://github.com/EttusResearch/uhd/compare/v3.14.0.0...v3.15.0.0 [4] > > Please report any bugs found on the UHD issue tracker: > http://github.com/EttusResearch/uhd/issues [5] > * Please do not use the issue tracker for help or support. > Pull requests for direct code changes can be submitted to the UHD or FPGA repositories: > > http://github.com/EttusResearch/uhd/pulls [6] > > http://github.com/EttusResearch/fpga/pulls [7] > > As always, we at Ettus Research would like to thank all of the UHD users in the open source SDR community. This release contains commits from users in the community that submitted pull requests against the UHD [8] and FPGA [9] repositories as well as many commits that are a direct result of issues reported back to us by users like you through the UHD [10] and FPGA [11] issue trackers, the USRP-users mailing list [12], and Ettus support [13]. You have all helped contribute to the continued improvement of UHD. Thank you! > CHANGELOG: > ## 003.015.000.000 > * N320: Fix MCR initialization, fix checks for LO distribution board, > reset RX IQ balance on init, replace DRAM FIFO with replay block, > improve constraints, fix I/Q imbalance compensation, add FPGPIO control > * N310: increase default dc offset averaging window, make tunes > asynchronous, add capability to control RF filter bypass and freq.band > limits, fix setting user DB EEPROM, correctly report N321 vs N320, > improve DDR3 BIST, update max revision to 7, fix DMA arbitration to > use contiguous packets, replace DRAM FIFO with replay block, fix SFP > link up status, add workaround for clocking interference with external > reference clocks, disable gpsdo clock/time source options when > enable_gps=0 > * X300: Fix max bitfile size, fix GPIO ATR property access type, heavily > refactor, introduce conn_mgr, add DPDK support, add > capability to flash NI-2974 FPGA, fix clocking code, enable 11.52 MHz > and 23.04 MHz system ref rates, improve usage of constrained device > args, enable ADC gain through RFNoC API, add mode to set master clock > rate to arbitrary values between 184.32 and 200 MHz, throttle > muxed_zero_copy_if > * E320: Fix time source clobbering ref source, add support for RevE, fix > reporting of FPGA version hash, fix SFP link up status, fix missing > ce_clk driver > * E310: Convert to MPM architecture, fix uhd_image_loader usage, fix DMA > arbitration to use contiguous packets, reduced DMA chans to 4 (using > data stream muxing), fix DRAM_TEST target build > * E3xx: Correct frontend name in devtest > * B200: Add command to query bootloader status, fix sc12 streaming, fix > FIFO sizes on GPIFII interface > * UBX: add temperature compensation mode > * SBX: Only update ATRs when lock state changes > * TwinRX: add LO charge pump properties, increase default charge pump > value on LO1, add low spur tuning mode, fix duplicate write to N value > in DDC > * RFNoC/device3: Read command FIFO size from device instead of > hardcoding values, fix multidevice graph connections, ENABLE_RFNOC now > defaults to ON, search all nodes for tick rate, add update_graph() > call which lets blocks do a graph-wide update of properties, fix > missing port arg in SR_WRITE Noc-Script call, constrain > send/recv_frame_size baed on MTU, fix flushing on init/deinit, disable > FC ACKs for lossless links > * RFNOC/FPGA: Fix rb_stb in split stream block, fix off-by-one error in > the window block, fix phase reset and -accumulator for DDC and DUC > blocks, fix flushing on split-stream block, fix DC offset issue with > DDS by using proper rounding, fix DUC/DDC sample rate switching by > latching N on M in axi_rate_change, various fixes to > uhd_image_builder, fix MTU settings in blocks, align byte count to > 8-byte word > * RFNOC: Allow UHD_RFNOC_DIR to contain multiple paths > * Python API: Replace Boost.Python with PyBind11, fix benchmark_rate > statistics, fix phase alignment test script > * Python API: Added include of complex.h to allow pybind to convert > complex data types > * Python API: Make multi_usrp::get_*_usrp_info() return a Python dict > * Python API: Fix array processing in send_waveforms() > * UHD: Allow ignoring fallthrough warnings, reduce Boost footprint, > remove gpsd dependency, improve streaming, reduced the number of > compiler warnings, introduce pop() to the prop tree, add typecast > operator from uhd::dict to std::map, properly cache config file > data > * MPM/mpmd: Introduce compatible rev numbers to support future hardware, > fix some resource leaks in mpmd, fix spurious reclaims causing > unnecessary warnings, fix resource leaks in liberio xport, allow to > mux data streams over liberio transports (e.g. to require fewer DMA > channels on E310), wait for DPDK links to come up before proceeding, > relax failure handling when updating components (fixes spurious errors > when updating FPGA images over SFP), fix issue where RPC > initialization would hang on failure > * MPM: Re-enable RPC server timeouts after components have been updated > * MPMD: Remove arbitrary frame size defaults for UDP transports > * MPMD: Fix incorrect link rate warnings > * FPGA: Use new device-tree overlay syntax, upgraded to Vivado 2018.3, > broke various paths with critical timing, allow SystemVerilog source > files, improve viv_modify_bd and viv_modify_tcl_bd, fix resets on 2clk > FIFOs > * USB: Allow cancelled USB requests to occur > * USB: Fix global session race condition > * Logging: Always honour log level, don't log colours for non-ttys, fix > includes, demote various log messages, fix logging colours, fix > deadlock on Windows machines > * Examples: Fix benchmark_rate INIT_DELAY, fix memory leak in > tx_samples_c > * Examples: Remove thread priority elevation > * Examples: Add options to benchmark_rate for start delays and priority > * Tests: Make the Python interpreter for devtests a parameter, add unit > tests to MPM > * Utilities: Fix converter benchmark for Py3k and scaling issue > * Tools: Fix kitchen_sink > * Tools: Fix Wireshark dissectors to work with WS1, 2, and 3 > * Tools: Various fixes to FPGA functional verification tests > * Docs: Various fixes, fix Doxygen warnings, fix links to KB, update > DPDK information about building libraries, add DPDK subsection about > thread priorities, update testing procedures > * C API: Add uhd_get_abi_string, uhd_get_version_string > * CMake: Make manpage compression optional, allow setting of PKG_DOC_DIR > from the CMake command line, add replay example, fix missing 'project', > replace ENABLE_PYTHON3 with a simpler Python detection, clean up > superfluous modules, improve log statements, bump dependency min > versions, add MPM unit testing, fix missing BIGOBJ for MSVC, add our > own UHDBoost.cmake to better find Boost across versions and systems, > constrain DPDK check to exact version > * Formatting: Apply clang-format to all files, break after template > Best regards, > Michael -- by krono86 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