disabling ddc duc blocks in rfnoc usrp e310

[Ivan Zahartchuk]

Hello. I want to create an image of fosphor, window, fft, 2x AXI FIFOs, FIR
for USRP E310. I need to change the spectral bandwidth. But with the
samp_rate parameter this does not work out very well. Therefore, I want to
use the FIR filter for these purposes, but when building the bit file, I do
not have enough space on the FPGA. Therefore, I decided to turn off the DDC
and DUC blocks, but I don’t know how to do it. I would be grateful for any
information.