Thank you for your reply and sorry for using this mailing list. I will continue this question in the usrp-users mailing list.
Best, Louis > 2021. 4. 16. 오후 11:32, Marcus D Leech <[email protected]> 작성: > > This is the wrong mailing list for discussions of USRP hardware. But yes, the > FPGA in the E310 is not as big as on other USRP devices. > > This discussion should be continued on the usrp-users mailing list. > > Sent from my iPhone > >> On Apr 16, 2021, at 8:26 AM, Louis Jung <[email protected]> wrote: >> >> Dear all, >> >> I always appreciate your help. >> >> I’m trying to run Wi-Fi OFDM receiver in E310. >> >> However, when I tried to build custom fpga image with fft, window, and >> schmidl_cox blocks, it always fails with the error: >> ''ERROR: [Place 30-640] Place Check : This design requires more Slice LUTs >> cells than are available in the target device. This design requires 62507 of >> such cell types but only 53200 compatible sites are available in the target >> device. Please analyze your synthesis results and constraints to ensure the >> design is mapped to Xilinx primitives as expected. If so, please consider >> targeting a larger device. Please set tcl parameter >> "drc.disableLUTOverUtilError" to 1 to change this error to warning.” >> >> Is it infeasible in E310 or I misconfigured something? >> >> Any guess? >> >> Best, >> >> Jinhwan
