IMO it would be useful to add a one line description of what the product does. Many people looking at e.g. the schematics will not know what a "Xua" is or does.
qi-hardware hosts an expanding list of proto-products all with code names. --- Ron K. Jeffries On Sat, Nov 13, 2010 at 14:01, Werner Almesberger <[email protected]> wrote: > Andr?s Calder?n wrote: >> Xu? is ready for (exhaustive) revision. Our Colombian team will review the >> design, but community support will be invaluable. > > I had a very quick look at it. It looks quite good, but a few > improvements would be nice to have before starting a real review: > > - URLs of the data sheets of the various chips used in there > > I've written a little system for caching and accessing data sheets. > It's called "data sheet viewer", abbreviated to "dsv". It lives in > eda-tools/dsv, but it's more convenient if you link/copy it into > /usr/local/bin/ or $HOME/bin > > It uses a file with URLs and short names for data sheets. One example > of such a file is ben-wpan/BOOKSHELF > > Each entry has one name tag (N:) that identifies the data sheet, plus > zero or more aliases (A:) that also identify it. In terms of use, > they're currently equivalent. "dsv" uses the name tag to detect the > beginning of an entry, so the name has to be first. > > The data sheet URL is specified in a D: tag. (Only one per entry. If > there are more, only the last one is used. It must be a PDF.) > > Example: > > N: at86rf230 > A: transceiver > A: txrx > A: atrf > D: http://www.atmel.com/dyn/resources/prod_documents/doc5131.pdf > > To download the data sheets, go to the directory where you want to > build the cache, e.g., the project's home directory, and run > dsv setup BOOKSHELF > > Now a data sheet can be accessed with dsv <name> e.g., > dsv txrx > > dsv searches for caches from the current directory towards the root. > So if you're in a subdirectory of the project, it will find "txrx" > as well. If you're in a different project, it won't find it. > > - a bit more complete component specs > > E.g., on DBG_PRG, FB1 and FB2 are unlabeled. On "Ethernet Phy", L1, > L2, L3, have the same problem, same thing on "USB". Ditto for the > resistor packs (RP*) on "FPGA Port 1 [...}" and all the resistors on > "Snesor PSU". > > - maybe fix some of the in/out label glitches > > E.g., on "Ethernet Phy", VDD2 on U1 connects to a weird-looking +3.3V. > The same happens on GND. I think they work as expected, but they still > look confusing. There's more of the same on other sheets, e.g., "Non > volatile memories". > > - do the unused-looking connections on expantion.sch (right side) and > NV_MEMORIES.sch (lower right quadrant) serve any purpose ? > > If they will be used later, maybe add a comment in the schematics. > > - do you have a BOM ? ;-) > > - do you like the order in which the sheets appear in the PDF ? If not, > we can change that easily in schhist. > >> GIT repository: >> http://projects.qi-hardware.com/index.php/p/xue/ > > By the way, for reviewing the footprints designed with fped, you can > > cd xue/kicad/modules > ../../../eda-tools/fpd2pdf/fpd2pdf -o all.pdf *.fpd > xpdf all.pdf > > - Werner > > _______________________________________________ > Qi Hardware Discussion List > Mail to list (members only): [email protected] > Subscribe or Unsubscribe: > http://lists.en.qi-hardware.com/mailman/listinfo/discussion > _______________________________________________ Qi Hardware Discussion List Mail to list (members only): [email protected] Subscribe or Unsubscribe: http://lists.en.qi-hardware.com/mailman/listinfo/discussion
