The DSP0134 v3.2.0 extended the Memory Device (Type 17) structure starting at offset 28h continuing to 4Ch to reflect persistent memory.
Signed-off-by: Jerry Hoemann <[email protected]> --- dmidecode.c | 113 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 113 insertions(+) diff --git a/dmidecode.c b/dmidecode.c index d18a258..77feee2 100644 --- a/dmidecode.c +++ b/dmidecode.c @@ -2499,6 +2499,84 @@ static void dmi_memory_device_type_detail(u16 code) } } +static void dmi_memory_technology(u8 code) +{ + /* 7.18.6 */ + static const char * const detail[] = { + "Other", /* 1 */ + "Unknown", + "DRAM", + "NVDIMM-N", + "NVDIMM-F", + "NVDIMM-P", + "Intel persistent memory" /* 7 */ + }; + if (code && code <= 0x07) + printf(" %s", detail[code - 0x01]); + else + printf(" %s", out_of_spec); +} + +static void dmi_memory_operating_mode_capility(u16 code) +{ + /* 7.18.7 */ + static const char * const detail[] = { + "Other", /* 1 */ + "Unknown", + "Volatile memory", + "Byte-accessible persistent memory", + "Block-accessible persistent memory" /* 5 */ + }; + + if ((code & 0xFFFE) == 0) + printf(" None"); + else { + int i; + + for (i = 1; i <= 5; i++) + if (code & (1 << i)) + printf(" %s", detail[i - 1]); + } +} + +static void dmi_memory_manufacturer_id(u16 code) +{ + /* 7.18.8 */ + /* 7.18.10 */ + /* LSB is 7-bit Odd Parity number of continuation codes. */ + if (code == 0) + printf(" Unknown"); + else + printf(" Bank %d, Hex 0x%2X", (code & 0x7f) + 1, code >> 8); +} + +static void dmi_memory_module_product_id(u16 code) +{ + /* 7.18.9 */ + if (code == 0) + printf(" Unknown"); + else + printf(" 0x%04X", code); +} + +static void dmi_memory_subsystem_controller_product_id(u16 code) +{ + /* 7.18.11 */ + if (code == 0) + printf(" Unknown"); + else + printf(" 0x%04X", code); +} + +static void dmi_memory_size(u64 code) +{ + if (code.h == 0xFFFFFFFF && code.l == 0xFFFFFFFF) + printf(" Unknown"); + else + printf(" 0x%08X%08X", code.h, code.l); +} + + static void dmi_memory_device_speed(u16 code) { if (code == 0) @@ -3907,6 +3985,41 @@ static void dmi_decode(const struct dmi_header *h, u16 ver) printf("\tConfigured Voltage:"); dmi_memory_voltage_value(WORD(data + 0x26)); printf("\n"); + + if (h->length < 0x4c) break; + printf("\tMemory Technology:"); + dmi_memory_technology(data[0x28]); + printf("\n"); + printf("\tMemory Operating Mode Capability:"); + dmi_memory_operating_mode_capility(WORD(data + 0x29)); + printf("\n"); + printf("\tFirmware Version: %s\n", + dmi_string(h, data[0x2B])); + printf("\tModule Manufacturer ID:"); + dmi_memory_manufacturer_id(WORD(data + 0x2C)); + printf("\n"); + printf("\tModule Product ID:"); + dmi_memory_module_product_id(WORD(data + 0x2E)); + printf("\n"); + printf("\tMemory Subsystem Controller Manufacturer ID:"); + dmi_memory_manufacturer_id(WORD(data + 0x30)); + printf("\n"); + printf("\tMemory Subsystem Controller Product ID:"); + dmi_memory_subsystem_controller_product_id(WORD(data + 0x32)); + printf("\n"); + printf("\tNon-Volatile Size:"); + dmi_memory_size(QWORD(data + 0x34)); + printf("\n"); + printf("\tVolatile Size:"); + dmi_memory_size(QWORD(data + 0x3C)); + printf("\n"); + printf("\tCache Size:"); + dmi_memory_size(QWORD(data + 0x44)); + printf("\n"); + printf("\tLogical Size:"); + dmi_memory_size(QWORD(data + 0x4C)); + printf("\n"); + break; case 18: /* 7.19 32-bit Memory Error Information */ -- 2.13.6 _______________________________________________ https://lists.nongnu.org/mailman/listinfo/dmidecode-devel
