Hi Xose, On Tue, 9 Dec 2025 18:35:55 +0100, Xose Vazquez Perez wrote: > On 7/2/25 5:45 PM, Jean Delvare wrote: > > > We already added some of the SMBIOS 3.8.0 changes (new processor family > > names and sockets). Add the missing pieces. > > > > [PATCH 1/6] dmidecode: Rename BIOS to Firmware > > [PATCH 2/6] dmidecode.8: Clarify what "bios" and "firmware" keywords refer > > to > > [PATCH 3/6] dmidecode: Add processor family "Xeon D" > > [PATCH 4/6] dmidecode: Deprecate the processor voltage field > > [PATCH 5/6] dmidecode: Rework the decoding of the arm64 SoC ID > > [PATCH 6/6] dmidecode: Mark SMBIOS 3.8.0 as supported > > > > dmidecode.c | 66 > > +++++++++++++++++++++++++++++++++----------------------- > > man/dmidecode.8 | 15 ++++++++---- > > 2 files changed, 49 insertions(+), 32 deletions(-) > > The 3.9 PDF contains changes for 3.8 that were not included in its own doc. > It appears that the changelog in the 3.8 PDF has been truncated: > https://www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.9.0.pdf > https://www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.8.0.pdf
I didn't notice, thanks for the heads up. > Changes missing from the 3.8.0: > ==== cut === > [...] > CR241: use ™ and ® in Intel® processor strings ----> bellow this: > > * Memory Device (Type 17): > – CR238: add CAMM form factor > – CR242: add MRDIMM memory technology These I have already included in [PATCH 5/6] dmidecode: Add 3 memory device form factors and 1 type which I posted to the list yesterday. > * Management Controller Host Interface (Type 42): > – CR233: reference MCTP host interface This references external specifications. At the moment we only support Redfish protocol type. Unfortunately I don't have any example of an MCTP implementation, and I'm reluctant to write the code if I can't test it. So this is left for later, once actual MCTP implementations exist and someone provides a dump of the DMI table so that I can work on it (or someone else contributes the code). > * Processor Additional Information (Type 44): > – Updated URL for RISC-V processor information > – CR234: Introduce Arm Processor-specific data > – CR243: Additional Arm Processor-specific data > ==== cut === We do not support type 44 yet, so these changes are not relevant. They'll get implemented when we finally implement support for this record type. -- Jean Delvare SUSE L3 Support
