Hello, everyone. A colleague and myself are working on Verilog support for Doxygen. As some of you know, Verilog is supported in the doxygen-verilog project, but the Verilog language has expanded considerably since that implementation was written.
Our intention is to make IEEE 1800-2012 Verilog and SystemVerilog support a part of the regular Doxygen project, I'd like to know if there are other developers adding new languages so that we can compare notes, and use a consistent approach. Is anyone else working on adding new languages? There's been mention in the past of a new Doxygen architecture that makes additional languages easier to support, is that already implemented in the doxygen code, or are more changes coming? Any advice would be appreciated, Andrew & David. Ottawa, Canada. -- =========================================================== “The opposite of love is not hate, it's indifference. The opposite of art is not ugliness, it's indifference. The opposite of faith is not heresy, it's indifference. And the opposite of life is not death, it's indifference.” ― Elie Wiesel <http://www.goodreads.com/author/show/1049.Elie_Wiesel>
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