[PATCH 09/22] drm/radeon/si: implement get_current_sclk/mclk

[Alex Deucher]

Will be used for exposing current clocks via INFO ioctl.

Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
 drivers/gpu/drm/radeon/radeon_asic.c |  2 ++
 drivers/gpu/drm/radeon/radeon_asic.h |  2 ++
 drivers/gpu/drm/radeon/si_dpm.c      | 36 ++++++++++++++++++++++++++++++++++++
 3 files changed, 40 insertions(+)

diff --git a/drivers/gpu/drm/radeon/radeon_asic.c 
b/drivers/gpu/drm/radeon/radeon_asic.c
index 5faeab66..ccfc518 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -1953,6 +1953,8 @@ static struct radeon_asic si_asic = {
                .debugfs_print_current_performance_level = 
&si_dpm_debugfs_print_current_performance_level,
                .force_performance_level = &si_dpm_force_performance_level,
                .vblank_too_short = &ni_dpm_vblank_too_short,
+               .get_current_sclk = &si_dpm_get_current_sclk,
+               .get_current_mclk = &si_dpm_get_current_mclk,
        },
        .pflip = {
                .page_flip = &evergreen_page_flip,
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h 
b/drivers/gpu/drm/radeon/radeon_asic.h
index a1de01b..17a8904 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -751,6 +751,8 @@ void si_dpm_debugfs_print_current_performance_level(struct 
radeon_device *rdev,
                                                    struct seq_file *m);
 int si_dpm_force_performance_level(struct radeon_device *rdev,
                                   enum radeon_dpm_forced_level level);
+u32 si_dpm_get_current_sclk(struct radeon_device *rdev);
+u32 si_dpm_get_current_mclk(struct radeon_device *rdev);

 /* DCE8 - CIK */
 void dce8_bandwidth_update(struct radeon_device *rdev);
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c
index 9e4d5d7..34ab390 100644
--- a/drivers/gpu/drm/radeon/si_dpm.c
+++ b/drivers/gpu/drm/radeon/si_dpm.c
@@ -6537,3 +6537,39 @@ void 
si_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
                           current_index, pl->sclk, pl->mclk, pl->vddc, 
pl->vddci, pl->pcie_gen + 1);
        }
 }
+
+u32 si_dpm_get_current_sclk(struct radeon_device *rdev)
+{
+       struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
+       struct radeon_ps *rps = &eg_pi->current_rps;
+       struct ni_ps *ps = ni_get_ps(rps);
+       struct rv7xx_pl *pl;
+       u32 current_index =
+               (RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & 
CURRENT_STATE_INDEX_MASK) >>
+               CURRENT_STATE_INDEX_SHIFT;
+
+       if (current_index >= ps->performance_level_count) {
+               return 0;
+       } else {
+               pl = &ps->performance_levels[current_index];
+               return pl->sclk;
+       }
+}
+
+u32 si_dpm_get_current_mclk(struct radeon_device *rdev)
+{
+       struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
+       struct radeon_ps *rps = &eg_pi->current_rps;
+       struct ni_ps *ps = ni_get_ps(rps);
+       struct rv7xx_pl *pl;
+       u32 current_index =
+               (RREG32(TARGET_AND_CURRENT_PROFILE_INDEX) & 
CURRENT_STATE_INDEX_MASK) >>
+               CURRENT_STATE_INDEX_SHIFT;
+
+       if (current_index >= ps->performance_level_count) {
+               return 0;
+       } else {
+               pl = &ps->performance_levels[current_index];
+               return pl->mclk;
+       }
+}
-- 
1.8.3.1