On 04.09.2014 16:47, Benjamin Herrenschmidt wrote:
> On all current cache coherent powerpc processors, it is not legit
> to map system memory non-cachable. This will cause aliases with
> the linear mapping which can be fatal.
>
> The TTM should generally avoid it after Jerome placement patches but
> let's add a sanity check anyway to catch any possible remaining issue.
>
> Signed-off-by: Benjamin Herrenschmidt <benh at palm4.ozlabs.ibm.com>
[...]
> @@ -498,6 +501,20 @@ pgprot_t ttm_io_prot(uint32_t caching_flags, pgprot_t
> tmp)
> tmp = pgprot_noncached(tmp);
>
> #endif
> +#if defined(__powerpc__) && !defined(CONFIG_NOT_COHERENT_CACHE)
> + /*
> + * Using a non-cachable mapping of system memory on
> + * cache coherent powerpc's can be fatal, let's make
> + * sure this doesn't happen and warn if it does. The
> + * only exception is powermac with AGP which has to
> + * take the risk.
> + */
> + if (!machine_is(powermac) &&
> + ((caching_flags & TTM_PL_FLAG_SYSTEM) ||
> + (caching_flags & TTM_PL_FLAG_TT))) {
> + pr_err_once("TTM: Attempt to use a non-cached"
> + " mapping on RAM unsupported !\n");
> + return tmp;
NAK, this breaks AGP on PowerMacs.
--
Earthling Michel D?nzer | http://www.amd.com
Libre software enthusiast | Mesa and X developer
