The registers will be reset to default values when whole
power domain off, so restore registers from regsbak.

Signed-off-by: Mark Yao <mark.yao at rock-chips.com>
---
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c |    1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c 
b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index e08f318..4dfad065 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -475,6 +475,7 @@ static void vop_enable(struct drm_crtc *crtc)
                goto err_disable_aclk;
        }

+       memcpy(vop->regs, vop->regsbak, vop->len);
        /*
         * At here, vop clock & iommu is enable, R/W vop regs would be safe.
         */
-- 
1.7.9.5


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